Ali Shahabi

According to our database1, Ali Shahabi authored at least 7 papers between 2007 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Experimental Validation of CT-Snubber for Multichip SiC MOSFET Power Module.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2014
Configurable Systolic Matrix Multiplication.
Proceedings of the 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, 2014

2010
A partitioning approach to improve reconfigurable neuron-inspired online BIST.
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

A reconfigurable online BIST for combinational hardware using digital neural networks.
Proceedings of the 15th European Test Symposium, 2010

2007
Degradable mesh-based on-chip networks using programmable routing tables.
IEICE Electron. Express, 2007

High Level Synthesis of Degradable ASICs Using Virtual Binding.
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

Programmable Routing Tables for Degradable Torus-Based Networks on Chips.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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