Alireza Mahzoon

According to our database, Alireza Mahzoon authored at least 29 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Polynomial Formal Verification of a Processor: A RISC-V Case Study.

Lennart Weingarten, Alireza Mahzoon, Mehran Goli, Rolf Drechsler

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Towards Polynomial Formal Verification of AI-Generated Arithmetic Circuits.

Rolf Drechsler, Alireza Mahzoon

Proceedings of the International Symposium on Devices, Circuits and Systems, 2023

Polynomial Formal Verification of Floating Point Adders.

Jan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Divide and Verify: Using a Divide-and-Conquer Strategy for Polynomial Formal Verification of Complex Circuits.

Rolf Drechsler, Alireza Mahzoon

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Polynomial Formal Verification of Complex Circuits Using a Hybrid Proof Engine.

Alireza Mahzoon, Rolf Drechsler

Proceedings of the Applicable Formal Methods for Safe Industrial Products, 2023

2022

Formale Verifikation von strukturell komplexen Multiplizierern.

Alireza Mahzoon

Ausgezeichnete Informatikdissertationen, 2022

Formal verification of structurally complex multipliers.

Alireza Mahzoon

PhD thesis, 2022

RevSCA-2.0: SCA-Based Formal Verification of Nontrivial Multipliers Using Reverse Engineering and Local Vanishing Removal.

Alireza Mahzoon, Daniel Große, Rolf Drechsler

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Lower Bound Proof for the Size of BDDs representing a Shifted Addition.

Jan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler

CoRR, 2022

Preserving Design Hierarchy Information for Polynomial Formal Verification.

Rolf Drechsler, Alireza Mahzoon

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

ANN-based Performance Estimation of Embedded Software for RISC-V Processors.

Weiyan Zhang, Mehran Goli, Alireza Mahzoon, Rolf Drechsler

Proceedings of the IEEE International Workshop on Rapid System Prototyping, 2022

Polynomial Formal Verification of Complex Multipliers.

Alireza Mahzoon, Rolf Drechsler

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2022

Polynomial Formal Verification: Ensuring Correctness under Resource Constraints.

Rolf Drechsler, Alireza Mahzoon

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Divider Verification Using Symbolic Computer Algebra and Delayed Don't Care Optimization.

Alexander Konrad, Christoph Scholl, Alireza Mahzoon, Daniel Große, Rolf Drechsler

Proceedings of the 22nd Formal Methods in Computer-Aided Design, 2022

Towards Polynomial Formal Verification of Complex Arithmetic Circuits.

Rolf Drechsler, Alireza Mahzoon, Mehran Goli

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

Formal verification of modular multipliers using symbolic computer algebra and boolean satisfiability.

Alireza Mahzoon, Daniel Große, Christoph Scholl, Alexander Konrad, Rolf Drechsler

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

Polynomial word-level verification of arithmetic circuits.

Mohammed Barhoush, Alireza Mahzoon, Rolf Drechsler

Proceedings of the MEMOCODE '21: 19th ACM-IEEE International Conference on Formal Methods and Models for System Design, Virtual Event, China, November 20, 2021

Automated Debugging-Aware Visualization Technique for SystemC HLS Designs.

Mehran Goli, Alireza Mahzoon, Rolf Drechsler

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Verifying Dividers Using Symbolic Computer Algebra and Don't Care Optimization.

Christoph Scholl, Alexander Konrad, Alireza Mahzoon, Daniel Große, Rolf Drechsler

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Late Breaking Results: Polynomial Formal Verification of Fast Adders.

Alireza Mahzoon, Rolf Drechsler

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Polynomial Formal Verification of Prefix Adders.

Alireza Mahzoon, Rolf Drechsler

Proceedings of the 30th IEEE Asian Test Symposium, 2021

2020

ASCHyRO: Automatic Fault Localization of SystemC HLS Designs Using a Hybrid Accurate Rank Ordering Technique.

Mehran Goli, Alireza Mahzoon, Rolf Drechsler

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Towards Formal Verification of Optimized and Industrial Multipliers.

Alireza Mahzoon, Daniel Große, Christoph Scholl, Rolf Drechsler

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

RevSCA: Using Reverse Engineering to Bring Light into Backward Rewriting for Big and Dirty Multipliers.

Alireza Mahzoon, Daniel Große, Rolf Drechsler

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Combining Symbolic Computer Algebra and Boolean Satisfiability for Automatic Debugging and Fixing of Complex Multipliers.

Alireza Mahzoon, Daniel Große, Rolf Drechsler

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

PolyCleaner: clean your polynomials before backward rewriting to verify million-gate multipliers.

Alireza Mahzoon, Daniel Große, Rolf Drechsler

Proceedings of the International Conference on Computer-Aided Design, 2018

2017

OptiFEX: A Framework for Exploring Area-Efficient Floating Point Expressions on FPGAs With Optimized Exponent/Mantissa Widths.

Alireza Mahzoon, Bijan Alizadeh

IEEE Trans. Very Large Scale Integr. Syst., 2017

Systematic Design Space Exploration of Floating-Point Expressions on FPGA.

Alireza Mahzoon, Bijan Alizadeh

IEEE Trans. Circuits Syst. II Express Briefs, 2017

2015

Multi-objective Optimization of Floating Point Arithmetic Expressions Using Iterative Factorization.

Alireza Mahzoon, Bijan Alizadeh

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015