Amit Kumar Panda

According to our database, Amit Kumar Panda authored at least 6 papers between 2015 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

ASIC Implementation of Low PAPR Multidevice Variable-Rate Architecture for IEEE 802.11ah.

Rakesh Palisetty, Amit Kumar Panda, Kailash Chandra Ray

IEEE Trans. Instrum. Meas., 2021

2020

A Coupled Variable Input LCG Method and its VLSI Architecture for Pseudorandom Bit Generation.

Amit Kumar Panda, Kailash Chandra Ray

IEEE Trans. Instrum. Meas., 2020

High-Speed Area-Efficient VLSI Architecture of Three-Operand Binary Adder.

Amit Kumar Panda, Rakesh Palisetty, Kailash Chandra Ray

IEEE Trans. Circuits Syst., 2020

2019

Modified Dual-CLCG Method and its VLSI Architecture for Pseudorandom Bit Generation.

Amit Kumar Panda, Kailash Chandra Ray

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Area-Efficient Parallel-Prefix Binary Comparator.

Amit Kumar Panda, Rakesh Palisetty, Kailash Chandra Ray

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2015

FPGA Prototype of Low Latency BBS PRNG.

Amit Kumar Panda, Kailash Chandra Ray

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015