Amr M. S. Tosson

According to our database, Amr M. S. Tosson authored at least 10 papers between 2013 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A Novel 2T2R CR-based TCAM Design for High-speed and Energy-efficient Applications.

Kangqiang Pan, Amr M. S. Tosson, Ningxuan Wang, Norman Y. Zhou, Lan Wei

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Error Resilience and Recovery of Process Induced Stuck-at Faults in MLP Neural Networks using Emerging Technology.

An Qi Zhang, Amr M. S. Tosson, Lan Wei

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

A Novel Programmable Variation-Tolerant RRAM-based Delay Element Circuit.

Kangqiang Pan, Amr M. S. Tosson, Norman Y. Zhou, Lan Wei

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

2017

A Study of the Effect of RRAM Reliability Soft Errors on the Performance of RRAM-Based Neuromorphic Systems.

Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei

IEEE Trans. Very Large Scale Integr. Syst., 2017

Analysis of RRAM Reliability Soft-Errors on the Performance of RRAM-Based Neuromorphic Systems.

Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Mitigating the Effect of Reliability Soft-errors of RRAM Devices on the Performance of RRAM-based Neuromorphic Systems.

Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

1T2R: A novel memory cell design to resolve single-event upset in RRAM arrays.

Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

RRAM Refresh Circuit: A Proposed Solution To Resolve The Soft-Error Failures For HfO₂/Hf 1T1R RRAM Memory Cell.

Amr M. S. Tosson, Mohab H. Anis, Lan Wei

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

8T1R: A Novel Low-power High-speed RRAM-based Non-volatile SRAM Design.

Amr M. S. Tosson Abdelwahed, Adam Neale, Mohab H. Anis, Lan Wei

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2013

Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design.

Amr M. S. Tosson, Siddharth Garg, Mohab H. Anis

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013