Mohab H. Anis
According to our database1,
Mohab H. Anis
authored at least 21 papers
between 2000 and 2017.
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Bibliography
2017
A Study of the Effect of RRAM Reliability Soft Errors on the Performance of RRAM-Based Neuromorphic Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2017
Analysis of RRAM Reliability Soft-Errors on the Performance of RRAM-Based Neuromorphic Systems.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Mitigating the Effect of Reliability Soft-errors of RRAM Devices on the Performance of RRAM-based Neuromorphic Systems.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
RRAM Refresh Circuit: A Proposed Solution To Resolve The Soft-Error Failures For HfO<sub>2</sub>/Hf 1T1R RRAM Memory Cell.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Parametric DFM Solution for Analog Circuits: Electrical-Driven Hotspot Detection, Analysis, and Correction Flow.
IEEE Trans. Very Large Scale Integr. Syst., 2013
Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
2012
Schematic-driven physical verification: Fully automated solution for analog IC design.
Proceedings of the IEEE 25th International SOC Conference, 2012
High performance electrical driven hotspot detection solution for full chip design using a novel device parameter matching technique.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
2011
A statistical yield optimization framework for interconnect in double patterning lithography.
Microelectron. J., 2011
A parametric DFM solution for analog circuits: Electrical driven hot spot detection, analysis and correction flow.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the 6th IEEE International Design and Test Workshop, 2011
2010
A DFM tool for analyzing lithography and stress effects on standard cells and critical path performance in 45nm digital designs.
Proceedings of the 5th International Design and Test Workshop, 2010
2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2000
A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000