Anders Edman

According to our database, Anders Edman authored at least 6 papers between 1996 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

Synchronous latency-insensitive design for multiple clock domain.

Anders Edman, Christer Svensson, Behzad Mesgarzadeh

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

2004

Bit Memory Instructions for a General CPU.

Mikael Olausson, Anders Edman, Dake Liu

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

Timing closure through a globally synchronous, timing partitioned design methodology.

Anders Edman, Christer Svensson

Proceedings of the 41th Design Automation Conference, 2004

2001

A low-power 416-lag 1.5-b 0.5-TMAC correlator in 0.6-μm CMOS.

Anders Edman, Jacob Christensen, Anders Emrich, Christer Svensson

IEEE J. Solid State Circuits, 2001

2000

An interconnect-driven design of a DFT processor.

Daniel Eckerbert, Henrik Eriksson, Per Larsson-Edefors, Anders Edman

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1996

A comparison of bit-serial and multi-bit processor elements in a real-time signal processing SIMD architecture.

Anders Åström, Michael Hall, Anders Edman

Proceedings of the 3rd International Conference on High Performance Computing, 1996