Daniel Eckerbert

According to our database, Daniel Eckerbert authored at least 11 papers between 2000 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

Complex IF Harmonic Rejection Mixer for Non-Contiguous Dual Carrier Reception in 65 nm CMOS.

Lars Sundström, Staffan Ek, Jim Svensson, Martin Anderson, Roland Strandberg, Fenghao Mu, Imad ud Din, Thomas Olsson, Leif R. Wilhelmsson, Daniel Eckerbert

IEEE J. Solid State Circuits, 2013

A receiver for LTE Rel-11 and beyond supporting non-contiguous carrier aggregation.

Lars Sundström, Martin Anderson, Roland Strandberg, Staffan Ek, Jim Svensson, Fenghao Mu, Thomas Olsson, Imad ud Din, Leif R. Wilhelmsson, Daniel Eckerbert, Sven Mattisson

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

A 4.75-34.75 MHz digitally tunable active-RC LPF for >60dB mean RX IRR in 65nm CMOS.

Martin Anderson, Roland Strandberg, Staffan Ek, Leif R. Wilhelmsson, Lars Sundström, Mattias Andersson, Imad ud Din, Jim Svensson, Thomas Olsson, Daniel Eckerbert

Proceedings of the 38th European Solid-State Circuit conference, 2012

2006

Toward architecture-based test-vector generation for timing verification of fast parallel multipliers.

Henrik Eriksson, Per Larsson-Edefors, Daniel Eckerbert

IEEE Trans. Very Large Scale Integr. Syst., 2006

2004

A power cut-off technique for gate leakage suppression [CMOS logic circuits].

Mindaugas Draidiiulis, Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003

Dual Threshold Voltage Circuits in the Presence of Resistive Interconnects.

Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson, Lars J. Svensson

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

A Mixed-Mode Delay-Locked-Loop Architecture.

Daniel Eckerbert, Lars J. Svensson, Per Larsson-Edefors

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

A deep submicron power estimation methodology adaptable to variations between power characterization and estimation.

Daniel Eckerbert, Per Larsson-Edefors

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2001

Cycle-true leakage current modeling for CMOS gates.

Daniel Eckerbert, Per Larsson-Edefors

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Interconnect-Driven Short-Circuit Power Modeling.

Daniel Eckerbert, Per Larsson-Edefors

Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

2000

An interconnect-driven design of a DFT processor.

Daniel Eckerbert, Henrik Eriksson, Per Larsson-Edefors, Anders Edman

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000