Andreas Lankes

According to our database¹, Andreas Lankes authored at least 9 papers between 2007 and 2015.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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2015

A Selective Packet Discard Technique for Efficient Deadlock Recovery in Networks-on-Chip.

[BibT_eX]

[DOI]

Andreas Lankes

PhD thesis, 2015

2012

Benefits of selective packet discard in networks-on-chip.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2012

A framework for Open Tiled Manycore System-On-Chip.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011

Hardware Support for Efficient Resource Utilization in Manycore Processor Systems.

[BibT_eX]

[DOI]

Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011

2010

Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks.

[BibT_eX]

[DOI]

Proceedings of the NOCS 2010, 2010

2009

NoC topology exploration for mobile multimedia applications.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Electronics, 2009

Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources.

[BibT_eX]

[DOI]

Andreas Lankes

Thomas Wild

Andreas Herkersdorf

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008

System Level Simulation of Autonomic SoCs with TAPES.

[BibT_eX]

[DOI]

Andreas Lankes

Thomas Wild

Johannes Zeppenfeld

Proceedings of the Architecture of Computing Systems, 2008

2007

Power Estimation of Time Variant SoCs with TAPES.

[BibT_eX]

[DOI]

Andreas Lankes

Thomas Wild

Johannes Zeppenfeld

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Andreas Lankes

Timeline

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Bibliography

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