Johannes Zeppenfeld

According to our database, Johannes Zeppenfeld authored at least 17 papers between 2006 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2012

A low-overhead monitoring ring interconnect for MPSoC parameter optimization.

Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

Applying autonomic principles for workload management in multi-core systems on chip.

Johannes Zeppenfeld, Andreas Herkersdorf

Proceedings of the 8th International Conference on Autonomic Computing, 2011

An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors.

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Hardware Support for Efficient Resource Utilization in Manycore Processor Systems.

Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld

Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011

Applying ASoC to Multi-core Applications for Workload Management.

Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf

Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

Autonomic System on Chip Platform.

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf

Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

Combining Software and Hardware LCS for Lightweight On-chip Learning.

Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel

Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

2010

Towards Scalability and Reliability of Autonomic Systems on Chip.

Johannes Zeppenfeld, Abdelmajid Bouajila, Andreas Herkersdorf, Walter Stechele

Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2010

Combining Software and Hardware LCS for Lightweight On-Chip Learning.

Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel

Proceedings of the Distributed, Parallel and Biologically Inspired Systems, 2010

A rapid prototyping system for error-resilient multi-processor systems-on-chip.

Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich

Proceedings of the Design, Automation and Test in Europe, 2010

Autonomic Workload Management for Multi-core Processor Systems.

Johannes Zeppenfeld, Andreas Herkersdorf

Proceedings of the Architecture of Computing Systems, 2010

2008

Learning Classifier Tables for Autonomic Systems on Chip.

Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf

Proceedings of the 38. Jahrestagung der Gesellschaft für Informatik, Beherrschbare Systeme, 2008

System Level Simulation of Autonomic SoCs with TAPES.

Andreas Lankes, Thomas Wild, Johannes Zeppenfeld

Proceedings of the Architecture of Computing Systems, 2008

2007

A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration.

Christopher Claus, Florian Helmut Müller, Johannes Zeppenfeld, Walter Stechele

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Power Estimation of Time Variant SoCs with TAPES.

Andreas Lankes, Thomas Wild, Johannes Zeppenfeld

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system.

Christopher Claus, Johannes Zeppenfeld, Florian Helmut Müller, Walter Stechele

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Organic Computing at the System on Chip Level.

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel

Proceedings of the IFIP VLSI-SoC 2006, 2006