Anita Karegar

According to our database, Anita Karegar authored at least 2 papers between 2011 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2025

"Zen 5": The AMD High-Performance 4nm x86-64 Microprocessor Core.

Teja Singh, Spence Oliver, Sundar Rangarajan, Shane Southard, Carson Henrion, Alex Schaefer, Brett Johnson, Sarah Bartaszewicz Tower, Kathy Hoover, Deepesh John, Ted Antoniadis, Shravan Lakshman, Vibhor Mittal, Brian Kasprzyk, Ross McCoy, Kurt Mohlman, Anitha Mohan, Hon-Hin Wong, Daryl Lieu, Russell Schreiber, Sahilpreet Singh, Nick Lance, Darryl Prudich, Justin Coppin, Tim Jackson, Anita Karegar, Ryan Miller, Sabeesh Balagangadharan, James Pistole, Wilson Li, Michael McCabe

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2011

An 8MB level-3 cache in 32nm SOI with column-select aliasing.

Don Weiss, Michael Dreesen, Michael Ciraula, Carson Henrion, Chris Helt, Ryan Freese, Tommy Miles, Anita Karegar, Russell Schreiber, Bryan Schneller, John J. Wuu

Proceedings of the IEEE International Solid-State Circuits Conference, 2011