Michael Ciraula

According to our database1, Michael Ciraula authored at least 5 papers between 1999 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
3D V-Cache: the Implementation of a Hybrid-Bonded 64MB Stacked Cache for a 7nm x86-64 CPU.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2011
An 8MB level-3 cache in 32nm SOI with column-select aliasing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009
A 2ns-read-latency 4Mb embedded floating-body memory macro in 45nm SOI technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007
An Integrated Quad-Core Opteron Processor.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

1999
Uniform approximation of discrete-time nonlinear systems.
Proceedings of the International Joint Conference Neural Networks, 1999


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