Ryan Freese

According to our database1, Ryan Freese authored at least 2 papers between 2009 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
An 8MB level-3 cache in 32nm SOI with column-select aliasing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009
A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS.
IEEE J. Solid State Circuits, 2009


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