Ankush Srivastava

Orcid: 0000-0002-7894-3952

According to our database1, Ankush Srivastava authored at least 8 papers between 2010 and 2022.

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Bibliography

2022
Low Capture Power At-Speed Test with Local Hot Spot Analysis to Reduce Over-Test.
Proceedings of the IEEE International Test Conference, 2022

2020
A Novel Approach of Data Content Zeroization Under Memory Attacks.
J. Electron. Test., 2020

2019
An Efficient Memory Zeroization Technique Under Side-Channel Attacks.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2017
A Reliability-Aware Methodology to Isolate Timing-Critical Paths under Aging.
J. Electron. Test., 2017

Identifying high variability speed-limiting paths under aging.
Proceedings of the 18th IEEE Latin American Test Symposium, 2017

Exploiting path delay test generation to develop better TDF tests for small delay defects.
Proceedings of the IEEE International Test Conference, 2017

2012
User Interface Design for Research Integrative Query (ResearchIQ)- An Ontology-anchored Interactive Query Tool.
Proceedings of the AMIA 2012, 2012

2010
A novel approach to improve test coverage of BSR cells.
Proceedings of the 2011 IEEE International Test Conference, 2010


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