Anthony C. J. Fox

Orcid: 0000-0002-1564-3784

Affiliations:
  • University of Cambridge, Department of Computer Science and Technology, UK
  • Arm Lid., UK


According to our database1, Anthony C. J. Fox authored at least 26 papers between 1996 and 2023.

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Bibliography

2023
A Verification Methodology for the Arm® Confidential Computing Architecture: From a Secure Specification to Safe Implementations.
Proc. ACM Program. Lang., April, 2023

2022
Verified Compilation and Optimization of Floating-Point Programs in CakeML (Artifact).
Dagstuhl Artifacts Ser., 2022

Taming an Authoritative Armv8 ISA Specification: L3 Validation and CakeML Compiler Verification.
Proceedings of the 13th International Conference on Interactive Theorem Proving, 2022

Verified Compilation and Optimization of Floating-Point Programs in CakeML.
Proceedings of the 36th European Conference on Object-Oriented Programming, 2022

2020
Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process.
Proceedings of the 2020 IEEE Symposium on Security and Privacy, 2020

2019
CHERI Concentrate: Practical Compressed Capabilities.
IEEE Trans. Computers, 2019

The verified CakeML compiler backend.
J. Funct. Program., 2019

Verified compilation on a verified processor.
Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2019

2018
A Verified Certificate Checker for Finite-Precision Error Bounds in Coq and HOL4.
Proceedings of the 2018 Formal Methods in Computer Aided Design, 2018

2017
Verified compilation of CakeML to multiple machine-code targets.
Proceedings of the 6th ACM SIGPLAN Conference on Certified Programs and Proofs, 2017

2016
A new verified compiler backend for CakeML.
Proceedings of the 21st ACM SIGPLAN International Conference on Functional Programming, 2016

2015
Improved Tool Support for Machine-Code Decompilation in HOL4.
Proceedings of the Interactive Theorem Proving - 6th International Conference, 2015

2012
Directions in ISA Specification.
Proceedings of the Interactive Theorem Proving - Third International Conference, 2012

2011
LCF-Style Bit-Blasting in HOL4.
Proceedings of the Interactive Theorem Proving - Second International Conference, 2011

Reconstruction of Z3's Bit-Vector Proofs in HOL4 and Isabelle/HOL.
Proceedings of the Certified Programs and Proofs - First International Conference, 2011

2010
A Trustworthy Monadic Formalization of the ARMv7 Instruction Set Architecture.
Proceedings of the Interactive Theorem Proving, First International Conference, 2010

Specification and Verification of ARM Hardware and Software.
Proceedings of the Design and Verification of Microprocessor Systems for High-Assurance Applications., 2010

2009
The semantics of power and ARM multiprocessor machine code.
Proceedings of the POPL 2009 Workshop on Declarative Aspects of Multicore Programming, 2009

2007
Hoare Logic for ARM Machine Code.
Proceedings of the International Symposium on Fundamentals of Software Engineering, 2007

2005
An Algebraic Framework for Verifying the Correctness of Hardware with Input and Output: A Formalization in HOL.
Proceedings of the Algebra and Coalgebra in Computer Science: First International Conference, 2005

2003
Algebraic models of correctness for abstract pipelines.
J. Log. Algebraic Methods Program., 2003

Formal Specification and Verification of ARM6.
Proceedings of the Theorem Proving in Higher Order Logics, 16th International Conference, 2003

2000
Algebraic Models of Correctness for Microprocessors.
Formal Aspects Comput., 2000

1999
Algebraic models for advanced microprocessors.
PhD thesis, 1999

1998
Algebraic Models of Superscalar Microprocessor Implementations: A Case Study.
Proceedings of the Prospects for Hardware Foundations, ESPRIT Working Group 8533, NADA, 1998

1996
An Algebraic Model of Correctness for Superscalar Microprocessors.
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996


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