Anton Karputkin

According to our database1, Anton Karputkin authored at least 5 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2016
A synthesis-agnostic behavioral fault model for high gate-level fault coverage.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2012
Identifying Untestable Faults in Sequential Circuits Using Test Path Constraints.
J. Electron. Test., 2012

Automated correction of design errors by edge redirection on High-Level Decision Diagrams.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011
Interactive presentation abstract: Automated correction of design errors by edge redirection on high-level decision diagrams.
Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop, 2011

Probabilistic equivalence checking based on high-level decision diagrams.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011


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