Arash Nejat

Orcid: 0000-0002-2276-1455

According to our database1, Arash Nejat authored at least 9 papers between 2014 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2020
Practical Experiments to Evaluate Quality Metrics of MRAM-Based Physical Unclonable Functions.
IEEE Access, 2020

2019
Practical Experiments on Fabricated TAS-MRAM Dies to Evaluate the Stochastic Behavior of Voltage-Controlled TRNGs.
IEEE Access, 2019

Restricting Switching Activity Using Logic Locking to Improve Power Analysis-Based Trojan Detection.
Proceedings of the 4th IEEE International Verification and Security Workshop, 2019

2018
ESCALATION: Leveraging Logic Masking to Facilitate Path-Delay-Based Hardware Trojan Detection Methods.
J. Hardw. Syst. Secur., 2018

2016
Reusing logic masking to facilitate path-delay-based hardware Trojan detection.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

How logic masking can improve path delay analysis for Hardware Trojan detection.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

High output hamming-distance achievement by a greedy logic masking approach.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2015
Facilitating side channel analysis by obfuscation for Hardware Trojan detection.
Proceedings of the 10th International Design & Test Symposium, 2015

2014
A study on the efficiency of hardware Trojan detection based on path-delay fingerprinting.
Microprocess. Microsystems, 2014


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