Arezoo Kamran

Orcid: 0000-0002-6681-5814

According to our database1, Arezoo Kamran authored at least 15 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Iterative construction of energy and quality-efficient approximate multipliers utilizing lower bit-length counterparts.
J. Supercomput., September, 2024

2023
Spiking Neural P System with weight model of majority voting technique for reliable interactive image segmentation.
Neural Comput. Appl., April, 2023

SAMA: Self-adjusting multi-cycle approximate adder.
Microelectron. J., April, 2023

2021
Flooding region growing: a new parallel image segmentation model based on membrane computing.
J. Real Time Image Process., 2021

2020
Speed-Up in Test Methods Using Probabilistic Merit Indicators.
J. Electron. Test., 2020

2019
HASTI: hardware-assisted functional testing of embedded processors in idle times.
IET Comput. Digit. Tech., 2019

2016
Self-Healing Many-Core Architecture: Analysis and Evaluation.
VLSI Design, 2016

Stochastic testing of processing cores in a many-core architecture.
Integr., 2016

2015
Aging in digital circuits and age monitoring: Object-oriented modeling and evaluation.
Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015

2014
Homogeneous many-core processor system test distribution and execution mechanism.
Proceedings of the 19th IEEE European Test Symposium, 2014

2013
Online periodic test mechanism for homogeneous many-core processors.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Extracting complete set of equations to analyze VHDL-AMS descriptions.
Proceedings of the East-West Design & Test Symposium, 2013

2010
Virtual tester development using HDL/PLI.
Proceedings of the 2010 East-West Design & Test Symposium, 2010

Merit based directed random test generation (MDRTG) scheme for combinational circuits.
Proceedings of the 2010 East-West Design & Test Symposium, 2010

Dual-purpose custom instruction identification algorithm based on Particle Swarm Optimization.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010


  Loading...