Arief Wicaksana

According to our database, Arief Wicaksana authored at least 8 papers between 2011 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Decoupling processor and memory hierarchy simulators for efficient design space exploration.

Fatma Jebali, Oumaima Matoussi, Arief Wicaksana, Amir Charif, Lilia Zaourar

Proceedings of the DroneSE and RAPIDO '22: System Engineering for constrained embedded systems, Budapest Hungary, January 17, 2022

2021

Hardware Context Switch-based Cryptographic Accelerator for Handling Multiple Streams.

Arif Sasongko, I. M. Narendra Kumara, Arief Wicaksana, Frédéric Rousseau, Olivier Muller

ACM Trans. Reconfigurable Technol. Syst., 2021

2020

Cross-level Co-simulation and Verification of an Automatic Transmission Control on Embedded Processor.

Cinzia Bernardeschi, Andrea Domenici, Maurizio Palmieri, Sergio Saponara, Tanguy Sassolas, Arief Wicaksana, Lilia Zaourar

Proceedings of the Software Engineering and Formal Methods. SEFM 2020 Collocated Workshops, 2020

2019

Hybrid Prototyping Methodology for Rapid System Validation in HW/SW Co-Design.

Arief Wicaksana, Amir Charif, Caaliph Andriamisaina, Nicolas Ventroux

Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019

2017

Prototyping dynamic task migration on heterogeneous reconfigurable systems.

Arief Wicaksana, Alban Bourge, Olivier Muller, Arif Sasongko, Frédéric Rousseau

Proceedings of the International Symposium on Rapid System Prototyping, 2017

2016

On-board non-regression test of HLS tools targeting FPGA.

Arief Wicaksana, Adrien Prost-Boucle, Olivier Muller, Frédéric Rousseau, Arif Sasongko

Proceedings of the 2016 International Symposium on Rapid System Prototyping, 2016

Demonstration of a context-switch method for heterogeneous reconfigurable systems.

Arief Wicaksana, Alban Bourge, Olivier Muller, Frédéric Rousseau

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2011

Fast and reconfigurable packet classification engine in FPGA-based firewall.

Arief Wicaksana, Arif Sasongko

Proceedings of the International Conference on Electrical Engineering and Informatics, 2011