Ashok K. Saxena
According to our database1,
Ashok K. Saxena
authored at least 16 papers
between 2009 and 2016.
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Bibliography
2016
Oxide thickness and S/D junction depth based variation aware OTA design using underlap FinFET.
Microelectron. J., 2016
2012
Microelectron. J., 2012
J. Circuits Syst. Comput., 2012
Analysis of double-gate FinFET-based address decoder for radiation-induced single-event-transients.
IET Circuits Devices Syst., 2012
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012
2011
Microelectron. Reliab., 2011
Modeling and estimation of edge direct tunneling current for nanoscale metal gate (Hf/AlN<sub>x</sub>) symmetric double gate MOSFET.
Microelectron. J., 2011
Electrical performance study of 25 nm Omega-FinFET under the influence of gamma radiation: A 3D simulation.
Microelectron. J., 2011
Process Variation Tolerant FinFET Based Robust Low Power SRAM Cell Design at 32 nm Technology.
J. Low Power Electron., 2011
Alpha-particle-induced effects in partially depleted silicon on insulator device: With and without body contact.
IET Circuits Devices Syst., 2011
Quantum Mechanical Analytical Drain Current Modeling and Simulation for Double Gate FinFET Device Using Quasi Fermi Potential Approach.
Proceedings of the International Conference on Soft Computing for Problem Solving (SocProS 2011) December 20-22, 2011, 2011
2010
Microelectron. Reliab., 2010
Robust Double Gate FinFET Based Sense Amplifier Design Using Independent Gate Control.
J. Low Power Electron., 2010
Quantum Inversion Charge and Drain Current Analysis for Double Gate FinFET Device: Analytical Modeling and TCAD Simulation Approach.
Proceedings of the Fourth UKSim European Symposium on Computer Modeling and Simulation, 2010
2009
J. Low Power Electron., 2009
Proceedings of the ARTCom 2009, 2009