Ashutosh Nandi

According to our database, Ashutosh Nandi authored at least 7 papers between 2010 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Temperature analysis of underlap GAA-SNWTs for analog/RF applications.

Shikhar Gupta, Ashutosh Nandi

Microelectron. J., 2019

Effect of air spacer in underlap GAA nanowire: an analogue/RF perspective.

Shikhar Gupta, Ashutosh Nandi

IET Circuits Devices Syst., 2019

2017

Comparative study of 16-order FIR filter design using different multiplication techniques.

Anubhuti Mittal, Ashutosh Nandi, Disha Yadav

IET Circuits Devices Syst., 2017

2016

Oxide thickness and S/D junction depth based variation aware OTA design using underlap FinFET.

Ashutosh Nandi, Ashok K. Saxena, Sudeb Dasgupta

Microelectron. J., 2016

2012

Impact of dual-k spacer on analog performance of underlap FinFET.

Ashutosh Nandi, Ashok K. Saxena, Sudeb Dasgupta

Microelectron. J., 2012

Analog Performance Analysis of Dual-k Spacer Based Underlap FinFET.

Ashutosh Nandi, Ashok K. Saxena, Sudeb Dasgupta

Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

2010

Design and Analysis of Sub-DT Sub-Domino Logic Circuits for Ultra Low Power Applications.

Ashutosh Nandi, Rajeevan Chandel

J. Low Power Electron., 2010