Atsunori Hirobe

According to our database, Atsunori Hirobe authored at least 2 papers between 1999 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2000

A 250-Mb/s/pin, 1-Gb double-data-rate SDRAM with a bidirectional delay and an interbank shared redundancy scheme.

Yasuhiro Takai, Mamoru Fujita, Kyoichi Nagata, Satoshi Isa, Shigeyuki Nakazawa, Atsunori Hirobe, Hiroaki Ohkubo, Masato Sakao, Shinichi Horiba, Tadashi Fukase, Yoshihiro Takaishi, Makoto Matsuo, Masahiro Komuro, Tetsuya Uchida, Takashi Sakoh, Kanta Saino, Shirou Uchiyama, Yuichi Takada, Junichi Sekine, Nobuko Nakanishi, Takeshi Oikawa, Masahiko Igeta, Hiroyoshi Tanabe, Hidenobu Miyamoto, Takeo Hashimoto, Hiromu Yamaguchi, Kuniaki Koyama, Yasuo Kobayashi, Takashi Okuda

IEEE J. Solid State Circuits, 2000

1999

Fast motion estimation algorithm and low-power CMOS motion estimation array LSI for MPEG-2 encoding.

Tadayoshi Enomoto, Yasumasa Sasajima, Atsunori Hirobe, Tetsuya Ohsawa

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999