Avishek Biswas
Orcid: 0000-0003-1237-3413
According to our database1,
Avishek Biswas authored at least 11 papers
between 2014 and 2025.
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Bibliography
2025
An Explainable AI Framework for Parkinson's Disease Prediction Using XGBoost, SHAP, and Large Language Model Integration.
Proceedings of the 12th International Conference on Next Generation Computing, 2025
2022
An area-efficient 6T-SRAM based Compute-In-Memory architecture with reconfigurable SAR ADCs for energy-efficient deep neural networks in edge ML applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
Proceedings of the MIG '21: Motion, 2021
Proceedings of the Brainlesion: Glioma, Multiple Sclerosis, Stroke and Traumatic Brain Injuries, 2021
2019
CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks.
IEEE J. Solid State Circuits, 2019
2018
Conv-RAM: An energy-efficient SRAM with embedded convolution computation for low-power CNN-based machine learning applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
A 0.36V 128Kb 6T SRAM with energy-efficient dynamic body-biasing and output data prediction in 28nm FDSOI.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
A 28 nm FDSOI Integrated Reconfigurable Switched-Capacitor Based Step-Up DC-DC Converter With 88% Peak Efficiency.
IEEE J. Solid State Circuits, 2015
2014
A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency.
Proceedings of the ESSCIRC 2014, 2014