Awais M. Kamboh
Orcid: 0000-0002-7491-1590
According to our database1,
Awais M. Kamboh
authored at least 27 papers
between 2007 and 2022.
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Bibliography
2022
ForASec: Formal Analysis of Hardware Trojan-Based Security Vulnerabilities in Sequential Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2020
Epileptic Seizure Detection With a Reduced Montage: A Way Forward for Ambulatory EEG Devices.
IEEE Access, 2020
2019
Using gate-level side channel parameters for formally analyzing vulnerabilities in integrated circuits.
Sci. Comput. Program., 2019
Computationally efficient fully-automatic online neural spike detection and sorting in presence of multi-unit activity for implantable circuits.
Comput. Methods Programs Biomed., 2019
TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
IEEE Access, 2018
McSeVIC: A Model Checking Based Framework for Security Vulnerability Analysis of Integrated Circuits.
IEEE Access, 2018
2017
Mallat's Scattering Transform Based Anomaly Sensing for Detection of Seizures in Scalp EEG.
IEEE Access, 2017
Motion artifact reduction from PPG signals during intense exercise using filtered X-LMS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Low SNR neural spike detection using scaled energy operators for implantable brain circuits.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
Classification of multi-class motor imagery EEG using four band common spatial pattern.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
Decoding brain cognitive activity across subjects using multimodal M/EEG neuroimaging.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
MRI based automated diagnosis of Alzheimer's: Fusing 3D wavelet-features with clinical data.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
2016
Proceedings of the 26th IEEE International Workshop on Machine Learning for Signal Processing, 2016
Formal Verification of Gate-Level Multiple Side Channel Parameters to Detect Hardware Trojans.
Proceedings of the Formal Techniques for Safety-Critical Systems, 2016
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016
2015
Displays, 2015
A CMOS Micro-power and Area Efficient Neural Recording and Stimulation Front-End for Biomedical Applications.
Circuits Syst. Signal Process., 2015
2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
A new architecture for neural signal amplification in implantable brain machine interfaces.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Resource Constrained VLSI Architecture for Implantable Neural Data Compression Systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
Analysis of Lifting and B-Spline DWT Implementations for Implantable Neuroprosthetics.
J. Signal Process. Syst., 2008
2007
A Scalable Wavelet Transform VLSI Architecture for Real-Time Signal Processing in High-Density Intra-Cortical Implants.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Area-Power Efficient VLSI Implementation of Multichannel DWT for Data Compression in Implantable Neuroprosthetics.
IEEE Trans. Biomed. Circuits Syst., 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007