B. Dinesh Kumar

According to our database, B. Dinesh Kumar authored at least 7 papers between 2017 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Design and implementation of a second order PLL based frequency synthesizer for implantable medical devices.

B. Dinesh Kumar, Hitesh Shrimali

Integr., 2022

2021

A Low-Power Quadrature LC-Oscillator Using Core-and-Coupling Current-Reuse.

B. Dinesh Kumar, Hitesh Shrimali, Nagarjuna Nallam

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS.

B. Dinesh Kumar, Sumit K. Pandey, Navneet Gupta, Hitesh Shrimali

Microelectron. J., 2020

2019

Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator.

Vijender Kumar Sharma, B. Dinesh Kumar, Muhammed Suhail Illikkal, Jai Narayan Tripathi, Navneet Gupta, Hitesh Shrimali

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS.

B. Dinesh Kumar, Hitesh Shrimali, Navneet Gupta

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

An Ultra-Fast Parallel Prefix Adder.

Kumar Sambhav Pandey, B. Dinesh Kumar, Neeraj Goel, Hitesh Shrimali

Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019

2017

A self-bandwidth switching & area-efficient PLL using multiplexer-controlled frequency selector.

B. Dinesh Kumar, Sumit Pandey, Puneet Arora, Rahul Shrestha

Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017