Navneet Gupta

According to our database, Navneet Gupta authored at least 23 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Numerical and Experimental Investigation of the Opposite Influence of Dielectric Anisotropy and Substrate Bending on Planar Radiators and Sensors.

Plamen I. Dankov, Praveen K. Sharma, Navneet Gupta

Sensors, 2021

Comparison of Neural Network based Soft Computing Techniques for Electromagnetic Modeling of a Microstrip Patch Antenna.

Yuvraj Singh Malhi, Navneet Gupta

CoRR, 2021

A Comprehensive Review of Unmanned Aerial Vehicle Attacks and Neutralization Techniques.

Vinay Chamola, Pavan Kotesh, Aayush Agarwal, Naren Naren, Navneet Gupta, Mohsen Guizani

Ad Hoc Networks, 2021

Energy Efficient Comparator-Less Current-Mode TFET-CMOS Co-Integrated Scalable Flash ADC.

Navneet Gupta, Hitesh Shrimali, Adam Makosiej, Andrei Vladimirescu, Amara Amara

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020

Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS.

B. Dinesh Kumar, Sumit K. Pandey, Navneet Gupta, Hitesh Shrimali

Microelectron. J., 2020

A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan.

Markus Hiienkari, Navneet Gupta, Jukka Teittinen, Jesse Simonsson, Matthew J. Turnquist, Jonas Eriksson, Risto Anttila, Ohto Myllynen, Hannu Rämäkkö, Sofia Mäkikyrö, Lauri Koskinen

Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020

2019

Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator.

Vijender Kumar Sharma, B. Dinesh Kumar, Muhammed Suhail Illikkal, Jai Narayan Tripathi, Navneet Gupta, Hitesh Shrimali

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS.

B. Dinesh Kumar, Hitesh Shrimali, Navneet Gupta

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

Related references for extended TED submission (uDRAM and uSRAM reference papers).

Navneet Gupta, Adam Makosiej, Amara Amara, Andrei Vladimirescu, Costin Anghel

Dataset, December, 2018

2017

Tunnel FET based ultra-low-leakage compact 2T1C SRAM.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Tunnel FET based refresh-free-DRAM.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

TFET NDR skewed inverter based sensing method.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Sorin Cotofana, Costin Anghel

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Ultra-compact SRAM design using TFETs for low power low voltage applications.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 46th European Solid-State Device Research Conference, 2016

3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Bandwidth and Gain Enhancement Technique for Gammadion Cross Dielectric Resonator Antenna.

Jitendra Kumar, Navneet Gupta

Wirel. Pers. Commun., 2015

Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology.

Amara Amara, Navneet Gupta, Khaja Ahmad Shaik, Costin Anghel, Kiyoo Itoh

Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes.

Andrei Vladimirescu, Costin Anghel, Amara Amara, Navneet Gupta, Adam Makosiej

Proceedings of the 6th International Workshop on Advances in Sensors and Interfaces, 2015

Ultra-low leakage sub-32nm TFET/CMOS hybrid 32kb pseudo DualPort scratchpad with GHz speed for embedded applications.

Navneet Gupta, Adam Makosiej, Oliver Thomas, Amara Amara, Andrei Vladimirescu, Costin Anghel

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

Performance Analysis of Dielectric Resonator Antennas.

Jitendra Kumar, Navneet Gupta

Wirel. Pers. Commun., 2014

2013

PODIA: Power Optimization through Differential Imbalanced Amplifier.

Prashant Dubey, Atul Kumar Kashyap, Navneet Gupta, Kaushik Saha

Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013