Neeraj Goel

Orcid: 0000-0003-3824-9437

According to our database1, Neeraj Goel authored at least 27 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Mapi-Pro: An Energy Efficient Memory Mapping Technique for Intermittent Computing.
ACM Trans. Archit. Code Optim., December, 2023

Efficient placement and migration policies for an STT-RAM based hybrid L1 cache for intermittently powered systems.
Des. Autom. Embed. Syst., December, 2023

A Survey on Seismic Sensor based Target Detection, Localization, Identification, and Activity Recognition.
ACM Comput. Surv., November, 2023

An Efficient NVM-Based Architecture for Intermittent Computing Under Energy Constraints.
IEEE Trans. Very Large Scale Integr. Syst., June, 2023

Design of Energy Harvesting based Hardware for IoT Applications.
CoRR, 2023

2022
eBaRe: An Efficient Backup and Restore Techniques in Hybrid L-1 Cache for Energy Harvesting Devices.
CoRR, 2022

Advances in gas sensors and electronic nose technologies for agricultural cycle applications.
Comput. Electron. Agric., 2022

Cattle Collar: An End-to-End Multi-Model Framework for Cattle Monitoring.
Proceedings of the 5th IEEE International Conference on Multimedia Information Processing and Retrieval, 2022

Cloud Removal in Satellite Imagery Using Adversarial Network and RGB-Optical Data Fusion.
Proceedings of the 5th IEEE International Conference on Multimedia Information Processing and Retrieval, 2022

Low-Intensity Human Activity Recognition Framework Using Audio Data in an Outdoor Environment.
Proceedings of the Computer Vision and Image Processing - 7th International Conference, 2022

Behind the Scenes of a Postgraduate Curriculum Design in an Autonomous Institute.
Proceedings of the COMPUTE 2022, Jaipur, India, November 9-11, 2022, 2022

2021
An End-to-End Framework for Dynamic Crime Profiling of Places.
CoRR, 2021

A Robust Training Signal Generator for Trainable Memristive Digital to Analog Converter.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

A Seismic Sensor based Human Activity Recognition Framework using Deep Learning.
Proceedings of the 17th IEEE International Conference on Advanced Video and Signal Based Surveillance, 2021

2020
High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

How Smart Are Smart Classrooms? A Review of Smart Classroom Technologies.
ACM Comput. Surv., 2020

ReARM: A Reconfigurable Approximate Rounding-Based Multiplier for Image Processing.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

Dynamic Scheduling of an Autonomous PTZ Camera for Effective Surveillance.
Proceedings of the 17th IEEE International Conference on Mobile Ad Hoc and Sensor Systems, 2020

ACA-CSU: A Carry Selection Based Accuracy Configurable Approximate Adder Design.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Event Detection and Localization for Sparsely Populated Outdoor Environment Using Seismic Sensor.
Proceedings of the 6th IEEE International Conference on Multimedia Big Data, 2020

2019
High-Throughput CNN Inference on Embedded ARM big.LITTLE Multi-Core Processors.
CoRR, 2019

A Multimedia Based Movie Style Model.
Proceedings of the IEEE International Conference on Multimedia & Expo Workshops, 2019

An Ultra-Fast Parallel Prefix Adder.
Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019

2017
A Crowd-Sourced Adaptive Safe Navigation for Smart Cities.
Proceedings of the 19th IEEE International Symposium on Multimedia, 2017

2014
Shared-port register file architecture for low-energy VLIW processors.
ACM Trans. Archit. Code Optim., 2014

2007
Power Reduction in VLIW Processor with Compiler Driven Bypass Network.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Energy Based Design Space Exploration of Multiprocessor VLIW Architectures.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007


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