Hitesh Shrimali

According to our database, Hitesh Shrimali authored at least 34 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

An On-chip Thermoelectric Cooler Controller With Improved Driving Current of 2 A at 0.5 Ω Load.

Sowmyashree S, Hitesh Shrimali

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

A Low Noise Bandgap Reference with 0.89 V Vref, 0.88 μVrms noise and 80 dB of PSRR.

Sowmyashree S, Hitesh Shrimali

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Fully Monolithic 1A Thermoelectric Cooler Controller with 90% Efficiency.

Sowmyashree S, Hitesh Shrimali

Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022

Design and implementation of a second order PLL based frequency synthesizer for implantable medical devices.

B. Dinesh Kumar, Hitesh Shrimali

Integr., 2022

Novel VLSI Architectures and Micro-Cell Libraries for Subscalar Computations.

Kumar Sambhav Pandey, Hitesh Shrimali

IEEE Access, 2022

Novel Observations and Physical Insights on PSIJ Behavior in CMOS Chain-of-Inverters.

Muhammed Suhail Illikkal, Jai Narayan Tripathi, Vijender Kumar Sharma, Hitesh Shrimali, Ramachandra Achar

IEEE Access, 2022

2021

Digitally Assisted Secondary Switch-and-Compare Technique for a SAR ADC.

Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Analytical Modeling of Power Supply Induced Jitter in CMOS Inverters due to Periodic Fluctuations.

Puneet Arora, Jai Narayan Tripathi, Hitesh Shrimali

Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

Energy Efficient Comparator-Less Current-Mode TFET-CMOS Co-Integrated Scalable Flash ADC.

Navneet Gupta, Hitesh Shrimali, Adam Makosiej, Andrei Vladimirescu, Amara Amara

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A Low-Power Quadrature LC-Oscillator Using Core-and-Coupling Current-Reuse.

B. Dinesh Kumar, Hitesh Shrimali, Nagarjuna Nallam

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Design of CMOS Device Process Sensor in 28 nm FD-SOI with 2 % of Frequency Spread.

Gowtham Peringattu Kalarikkal, Rohit Goel, Hitesh Shrimali

Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020

A Discrete-Time MOS Parametric Amplifier-Based Chopped Signal Demodulator.

Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma

IEEE Trans. Very Large Scale Integr. Syst., 2020

Deterministic Noise Analysis for Single-Stage Amplifiers by Extension of Indefinite Admittance Matrix.

Vijender Kumar Sharma, Jai Narayan Tripathi, Hitesh Shrimali

IEEE Open J. Circuits Syst., 2020

Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS.

B. Dinesh Kumar, Sumit K. Pandey, Navneet Gupta, Hitesh Shrimali

Microelectron. J., 2020

Reduced switching mode for SAR ADCs: analysis and design of SAR A-to-D algorithm with periodic standby mode circuit components.

Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma

IET Circuits Devices Syst., 2020

Design and Analysis of a Low PSIJ, Energy Efficient Bootstrapped Driver for Space Application.

Saurabh Dhiman, Vijender Kumar Sharma, Hitesh Shrimali

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

A Thomas Algorithm-Based Generic Approach for Modeling of Power Supply Induced Jitter in CMOS Buffers.

Jai Narayan Tripathi, Muhammed Suhail Illikkal, Hitesh Shrimali, Ramachandra Achar

IEEE Access, 2019

Design of a Charge Sensitive Amplifier for Silicon Particle Detector in BCD 180 nm Process.

Indu Yadav, Ashish Joshi, Ettore Ruscino, Valentino Liberali, Attilio Andreazza, Hitesh Shrimali

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator.

Vijender Kumar Sharma, B. Dinesh Kumar, Muhammed Suhail Illikkal, Jai Narayan Tripathi, Navneet Gupta, Hitesh Shrimali

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS.

B. Dinesh Kumar, Hitesh Shrimali, Navneet Gupta

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Design of HV-CMOS Detectors in BCD Technology with Noise and Crosstalk Measurements.

Indu Yadav, Ashish Joshi, Ettore Ruscino, Valentino Liberali, Attilio Andreazza, Hitesh Shrimali

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

An Ultra-Fast Parallel Prefix Adder.

Kumar Sambhav Pandey, B. Dinesh Kumar, Neeraj Goel, Hitesh Shrimali

Proceedings of the 26th IEEE Symposium on Computer Arithmetic, 2019

Energy Efficient Bootstrapped Driver for a Particle Detector in 180 nm SOI Technology.

Saurabh Dhiman, Indu Yadav, Hitesh Shrimali

Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018

Design of a Third Order Butterworth Gm-C Filter for EEG Signal Detection Application.

Ankita Deo, Sumit K. Pandey, Ashish Joshi, Satinder K. Sharma, Hitesh Shrimali

Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

The Capacitively Coupled Chopper Stabilized Amplifier with a DTPA based Demodulator.

Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

Systematic design approach for a gain boosted telescopic OTA with cross-coupled capacitor.

Ashish Joshi, Hitesh Shrimali, Satinder K. Sharma

IET Circuits Devices Syst., 2017

Distortion analysis for a DC-DC buck converter.

Vijender Kumar Sharma, Hitesh Shrimali, Jai Narayan Tripathi, Rakesh Malik

Proceedings of the International SoC Design Conference, 2017

Nonlinear modeling and analysis of buck converter using volterra series.

Hitesh Shrimali, Vijender Kumar Sharma, Jai Narayan Tripathi, Rakesh Malik

Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

2016

The pole-zero doublet: A cascode operational amplifier with cross coupled capacitor.

Ashish Joshi, Indu Yadav, Satinder K. Sharma, Hitesh Shrimali

Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

2015

A technique to linearize the discrete-time parametric amplifier.

Hitesh Shrimali, Shouri Chatterjee

Microelectron. J., 2015

2014

The start-up circuit for a low voltage bandgap reference.

Hitesh Shrimali, Valentino Liberali

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2011

Distortion Analysis of a Three-Terminal MOS-Based Discrete-Time Parametric Amplifier.

Hitesh Shrimali, Shouri Chatterjee

IEEE Trans. Circuits Syst. II Express Briefs, 2011

Third order harmonic cancellation technique for a parametric amplifier.

Hitesh Shrimali, Shouri Chatterjee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

11 GHz UGBW Op-amp with feed-forward compensation technique.

Hitesh Shrimali, Shouri Chatterjee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011