Ben Niewenhuis

According to our database1, Ben Niewenhuis authored at least 12 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Improving structural coverage of functional tests with checkpoint signature computation.
Proceedings of the IEEE International Test Conference, 2022

2019
Path Delay Test of the Carnegie Mellon Logic Characterization Vehicle.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Characterization of Locked Combinational Circuits via ATPG.
Proceedings of the IEEE International Test Conference, 2019

2018
A Logic Test Chip for Optimal Test and Diagnosis.
PhD thesis, 2018

2017
Multiple-defect diagnosis for Logic Characterization Vehicles.
Proceedings of the 22nd IEEE European Test Symposium, 2017

2016
Test chip design for optimal cell-aware diagnosability.
Proceedings of the 2016 IEEE International Test Conference, 2016

Logic characterization vehicle design reflection via layout rewiring.
Proceedings of the 2016 IEEE International Test Conference, 2016

Achieving 100% cell-aware coverage by design.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Efficient built-in self test of regular logic characterization vehicles.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Design reflection for optimal test-chip implementation.
Proceedings of the 2015 IEEE International Test Conference, 2015

2014
Logic characterization vehicle design for maximal information extraction for yield learning.
Proceedings of the 2014 International Test Conference, 2014

2013
SCAN-PUF: A low overhead Physically Unclonable Function from scan chain power-up states.
Proceedings of the 2013 IEEE International Test Conference, 2013


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