Bernardo Leite

Orcid: 0000-0002-9852-8182

Affiliations:
  • Federal University of Paraná (UFPR), Group of Integrated Circuits and Systems (GICS), Curitiba, Brazil


According to our database1, Bernardo Leite authored at least 18 papers between 2009 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Online presence:

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Bibliography

2025
CMOS Power Amplifiers for X-Band: A Survey.
Proceedings of the 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2025

2021
Concurrent Tri-band CMOS Power Amplifier Linearized by 3D Improved Memory Polynomial Digital Predistorter.
Circuits Syst. Signal Process., 2021

2020
A Novel Single Propagation Path Multimode PA.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

2019
Reduced-Complexity Polynomials with Memory Applied to the Linearization of Power Amplifiers with Real-Time Discrete Gain Control.
Circuits Syst. Signal Process., 2019

Energy Efficiency in Multiple Antenna Machine-Type Communications With Reconfigurable RF Transceivers.
IEEE Access, 2019

Comparison between direct and indirect learnings for the digital pre-distortion of concurrent dual-band power amplifiers.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

2018
Design of an RF Six-Mode CMOS Power Amplifier for Efficiency Improvement at Power Backoff.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

2.4 GHz Reconfigurable Low Voltage and Low Power VCO dedicated to Sensor Networks Applications.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
A fully integrated CMOS power amplifier with discrete gain control for efficiency enhancement.
Microelectron. J., 2017

Double quadrature bandpass sampling for a PLL and mixer-less low-IF multistandard receiver.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

2016
2.4 GHz CMOS digitally programmable power amplifier for power back-off operation.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2015
Design of 28 nm CMOS integrated transformers for a 60 GHz power amplifier.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Multimode 2.4 GHz CMOS power amplifier with gain control for efficiency enhancement at power backoff.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

2014
Co-design of a wideband double-balanced active mixer and transformer-based baluns for 77 GHz radar applications.
Microelectron. J., 2014

A comparison of high-efficiency UHF RFID rectifiers using internal voltage compensation and zero-threshold-voltage MOSFETs.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

2013
Optimization of 65nm CMOS passive devices to design a 16 dBm-Psat 60 GHz power amplifier.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

2010
Low power and high gain double-balanced mixer dedicated to 77 GHz automotive radar applications.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009
Shielding structures for millimeter-wave integrated transformers.
Proceedings of the 16th IEEE International Conference on Electronics, 2009


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