Bernardo Leite
Orcid: 0000-0002-9054-9501
According to our database1,
Bernardo Leite
authored at least 25 papers
between 2009 and 2024.
Collaborative distances:
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Bibliography
2024
Fostering the Ecosystem of Open Neural Encoders for Portuguese with Albertina PT* Family.
CoRR, 2024
2023
Do Rules Still Rule? Comprehensive Evaluation of a Rule-Based Question Generation System.
Proceedings of the 15th International Conference on Computer Supported Education, 2023
Proceedings of the Artificial Intelligence in Education - 24th International Conference, 2023
2022
Proceedings of the Natural Language Processing and Information Systems, 2022
Proceedings of the Progress in Artificial Intelligence, 2022
2021
Concurrent Tri-band CMOS Power Amplifier Linearized by 3D Improved Memory Polynomial Digital Predistorter.
Circuits Syst. Signal Process., 2021
Proceedings of the 13th International Conference on Agents and Artificial Intelligence, 2021
Proceedings of the Progress in Artificial Intelligence, 2021
2020
Proceedings of the International Conference on INnovations in Intelligent SysTems and Applications, 2020
Exploring NLP and Information Extraction to Jointly Address Question Generation and Answering.
Proceedings of the Artificial Intelligence Applications and Innovations, 2020
2019
Reduced-Complexity Polynomials with Memory Applied to the Linearization of Power Amplifiers with Real-Time Discrete Gain Control.
Circuits Syst. Signal Process., 2019
Energy Efficiency in Multiple Antenna Machine-Type Communications With Reconfigurable RF Transceivers.
IEEE Access, 2019
Comparison between direct and indirect learnings for the digital pre-distortion of concurrent dual-band power amplifiers.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019
2018
Design of an RF Six-Mode CMOS Power Amplifier for Efficiency Improvement at Power Backoff.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
2.4 GHz Reconfigurable Low Voltage and Low Power VCO dedicated to Sensor Networks Applications.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
2017
A fully integrated CMOS power amplifier with discrete gain control for efficiency enhancement.
Microelectron. J., 2017
Double quadrature bandpass sampling for a PLL and mixer-less low-IF multistandard receiver.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017
2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
2015
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
Multimode 2.4 GHz CMOS power amplifier with gain control for efficiency enhancement at power backoff.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
2014
Co-design of a wideband double-balanced active mixer and transformer-based baluns for 77 GHz radar applications.
Microelectron. J., 2014
A comparison of high-efficiency UHF RFID rectifiers using internal voltage compensation and zero-threshold-voltage MOSFETs.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
2013
Optimization of 65nm CMOS passive devices to design a 16 dBm-Psat 60 GHz power amplifier.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
2010
Low power and high gain double-balanced mixer dedicated to 77 GHz automotive radar applications.
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009