Renu Mehra

According to our database1, Renu Mehra authored at least 11 papers between 1995 and 2015.

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Bibliography

2015
Message from the general chairs.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2012
Commercial low-power EDA tools: a review.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

Industry focus session on low-power design.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

2002
RTL c-based methodology for designing and verifying a multi-threaded processor.
Proceedings of the 39th Design Automation Conference, 2002

2000
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths.
Proceedings of the 2000 Design, 2000

1997
A partitioning scheme for optimizing interconnect power.
IEEE J. Solid State Circuits, 1997

1996
Low-power architectural synthesis and the impact of exploiting locality.
J. VLSI Signal Process., 1996

An Integrated CAD Environment for Low-Power Design.
IEEE Des. Test Comput., 1996

Exploiting regularity for low-power design.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995
Optimizing power using transformations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Design guidance in the power dimension.
Proceedings of the 1995 International Conference on Acoustics, 1995


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