Byung-Soon Choi

According to our database, Byung-Soon Choi authored at least 3 papers between 1995 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2003

A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications.

June Lee, Sung-Soo Lee, Oh-Suk Kwon, Kyeong-Han Lee, Dae-Seok Byeon, In-Young Kim, Kyoung-Hwa Lee, Young-Ho Lim, Byung-Soon Choi, Jong-Sik Lee, Wang-Chul Shin, Jeong-Hyuk Choi, Kang-Deog Suh

IEEE J. Solid State Circuits, 2003

1997

A 3.3-V single power supply 16-Mb nonvolatile virtual DRAM using a NAND flash memory technology.

Tae-Sung Jung, Do-Chan Choi, Sung-Hee Cho, Myong-Jae Kim, Seung-Keun Lee, Byung-Soon Choi, Jin-Sun Yum, San-Hong Kim, Dong-Gi Lee, Jong-Chang Son, Myung-Sik Yong, Heung-Kwun Oh, Sung-Bu Jun, Woung-Moo Lee, E. Haq, Kang-Deog Suh, S. B. Ali, Hyung-Kyu Lim

IEEE J. Solid State Circuits, 1997

1995

A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme.

Kang-Deog Suh, Byung-Hoon Suh, Young-Ho Lim, Jin-Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sung-Soo Lee, Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, Hyung-Kyu Lim

IEEE J. Solid State Circuits, November, 1995