Chandan Giri

Orcid: 0000-0003-3687-6242

According to our database1, Chandan Giri authored at least 70 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Built-in Self-prevention (BISP) for runtime ageing effects of TSVs in 3D ICs.
Integr., January, 2024

2023
Mining the Human Networks and Identification of Group Activities Using the Crime Scraping Engine.
SN Comput. Sci., September, 2023

Threshold Analysis Using Probabilistic Xgboost Classifier for Hardware Trojan Detection.
J. Electron. Test., August, 2023

Fault Detection and Diagnosis of DMFB Using Concurrent Electrodes Actuation.
J. Electron. Test., February, 2023

Cost Effective Single Target Sample Preparation on Digital Microfluidic Biochip.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022
Frequency-scaled thermal-aware test scheduling for 3D ICs using machine learning based temperature estimation.
Microelectron. J., 2022

A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs.
ACM J. Emerg. Technol. Comput. Syst., 2022

WiZ-BMS: A Hybrid Wireless Network-on-Chip Design with Fully Adaptive Routing.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021
Cross-Layer MAC Protocol for Semantic Wireless Sensor Network.
Wirel. Pers. Commun., 2021

TSV-Cluster Defect Tolerance Using Tree-Based Redundancy for Yield Improvement of 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Hardware Trojan Horse Detection through Improved Switching of Dormant Nets.
ACM J. Emerg. Technol. Comput. Syst., 2021

Privacy preservation and secure data sharing scheme in fog based vehicular ad-hoc network.
J. Inf. Secur. Appl., 2021

Testing and Diagnosis of Digital Microfluidic Biochips using Multiple Droplets.
J. Electron. Test., 2021

2020
Noncooperative Gaming for Energy-Efficient Congestion Control in 6LoWPAN.
IEEE Internet Things J., 2020

An Efficient Test Scheduling to Co-optimize Test Time and Peak Power for 3D ICs.
Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

2019
EETC: Energy Efficient Tree-Clustering in Delay Constrained Wireless Sensor Network.
Wirel. Pers. Commun., 2019

Energy and Network Balanced Distributed Clustering in Wireless Sensor Network.
Wirel. Pers. Commun., 2019

A Statistical Model to Determine the Behavior Adoption in Different Timestamps on Online Social Network.
Int. J. Knowl. Syst. Sci., 2019

Approach of genetic algorithm for power-aware testing of 3D IC.
IET Comput. Digit. Tech., 2019

Identification of Random/Clustered TSV Defects in 3D IC During Pre-Bond Testing.
J. Electron. Test., 2019

On semantic clustering and adaptive robust regression based energy-aware communication with true outliers detection in WSN.
Ad Hoc Networks, 2019

Hardware Trojan Detection by Stimulating Transitions in Rare Nets.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Distributed α-fair transmit power adaptation based congestion control in VANET.
Proceedings of the 20th International Conference on Distributed Computing and Networking, 2019

Iterative Parallel Test to Detect and Diagnose Multiple Defects for Digital Microfluidic Biochip.
Proceedings of the 28th IEEE Asian Test Symposium, 2019

2018
Identification of Faulty TSVs in 3D IC During Pre-Bond Testing.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Optimized Concurrent Testing of Digital Microfluidic Biochips.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Detecting Hardware Trojans by Reducing Rarity of Transitions in ICs.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Non-Cooperative Game Theory Based Congestion Control in Lossy WSN.
Proceedings of the IEEE Global Communications Conference, 2018

Identification of Faulty TSV with a Built-In Self-Test Mechanism.
Proceedings of the 27th IEEE Asian Test Symposium, 2018

Test Diagnosis of Digital Microfluidic Biochips Using Image Segmentation.
Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017
Convoy Tree Based Fuzzy Target Tracking in Wireless Sensor Network.
Int. J. Wirel. Inf. Networks, 2017

Faulty TSVs Identification in 3D IC Using Pre-bond Testing.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Modeling and Analysis of Transient Heat for 3D IC.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Design-for-test and test time optimization for 3D SOCs.
Proceedings of the IEEE International Test Conference, 2017

TSV repairing for 3D ICs using redundant TSV.
Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017

MESNET: Mobile Sink Based Energy Saving Network Management in Wireless Sensor Network.
Proceedings of the Computational Intelligence, Communications, and Business Analytics, 2017

End device energy optimization in ASPL for semantic sensor network.
Proceedings of the 2017 IEEE International Conference on Advanced Networks and Telecommunications Systems, 2017

2016
A fuzzy communication model of sensor nodes in wireless sensor network.
Int. J. Sens. Networks, 2016

Optimization of Test Wrapper for TSV Based 3D SOCs.
J. Electron. Test., 2016

Tree based tracking target in wireless sensor network.
Proceedings of the 2016 International Conference on Advances in Computing, 2016

2015
Optimisation of test architecture in three-dimensional stacked integrated circuits for partial stack/complete stack using hard system-on-chips.
IET Comput. Digit. Tech., 2015

A thermal estimation model for 3D IC using liquid cooled microchannels and thermal TSVs.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Recovery of faulty TSVs in 3D ICs.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

Test Time Optimization for 3D-SICs Having Multiple Towers.
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015

Textual Entailment Using Different Similarity Metrics.
Proceedings of the Computational Linguistics and Intelligent Text Processing, 2015

2014
Session Based Core Test Scheduling for 3D SOCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Mach-Zehnder Interferometer Based All Optical Reversible Carry-Lookahead Adder.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Optimizing test time for core-based 3-d integrated circuits by a technique of bi-partitioning.
Proceedings of the 2014 East-West Design & Test Symposium, 2014

2013
k-Fault Tolerant Topology Control in Wireless Sensor Network.
Proceedings of the Recent Advances in Intelligent Informatics, 2013

Power constraints test scheduling of 3D stacked ICs.
Proceedings of the 8th International Design and Test Symposium, 2013

Optimizing test architecture of 3D stacked ICs for partial stack/complete stack using hard SoCs.
Proceedings of the 8th International Design and Test Symposium, 2013

Data collection point based mobile data gathering scheme with relay hop constraint.
Proceedings of the International Conference on Advances in Computing, 2013

Faulty TSVs identification and recovery in 3D stacked ICs during pre-bond testing.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

Optimal stacking of SOCs in a 3D-SIC for post-bond testing.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2012
Post-bond Stack Testing for 3D Stacked IC.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

Test Data Compression for NoC Based SoCs Using Binary Arithmetic Operations.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

Testing 3D stacked ICs for post-bond partial/complete stack.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

Binary Difference Based Test Data Compression for NoC Based SoCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Identifying Faulty TSVs in 3D Stacked IC during Pre-bond Testing.
Proceedings of the International Symposium on Electronic System Design, 2012

A Novel Fuzzy Sensing Model for Sensor Nodes in Wireless Sensor Network.
Proceedings of the Intelligent Informatics, 2012

2011
Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Optimization of Test Wrapper for TSV Based 3D SOCs.
Proceedings of the International Symposium on Electronic System Design, 2011

Optimizing Test Architecture for TSV Based 3D Stacked ICs Using Hard SOCs.
Proceedings of the International Symposium on Electronic System Design, 2011

2010
Non-preemptive test scheduling for Network-on-Chip(NoC) based systems by reusing NoC as TAM.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2007
A genetic algorithm based heuristic technique for power constrained test scheduling in core-based SOCs.
Proceedings of the IFIP VLSI-SoC 2007, 2007

Reducing Test-bus Power Consumption in Huffman Coding Based Test Data Compression for SOCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Test Scheduling for Core-Based SOCs Using Genetic Algorithm Based Heuristic Approach.
Proceedings of the Advanced Intelligent Computing Theories and Applications. With Aspects of Artificial Intelligence, 2007

Genetic Algorithm Based Approach for Hierarchical SOC Test Scheduling.
Proceedings of the 2007 International Conference on Computing: Theory and Applications (ICCTA 2007), 2007

Test Data Compression by Spilt-VIHC (SVIHC).
Proceedings of the 2007 International Conference on Computing: Theory and Applications (ICCTA 2007), 2007

Scan Power Reduction Through Scan Architecture Modification And Test Vector Reordering.
Proceedings of the 16th Asian Test Symposium, 2007


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