Chia-Yu Yao
Orcid: 0000-0001-9771-041X
According to our database1,
Chia-Yu Yao
authored at least 39 papers
between 1999 and 2024.
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Bibliography
2024
The Design of the NLMS Adaptive Filters Using the Fast-Division Approximation With CSD Encoded Divisors.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024
2021
An Efficient ECG Classification System Using Resource-Saving Architecture and Random Forest.
IEEE J. Biomed. Health Informatics, 2021
2019
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019
2018
Controlling a switched beam array antenna using PLL frequency synthesizers based on the congruence modulo.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
A QCQP design method of the symmetric pulse-shaping filters against receiver timing jitter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
A Low-Jitter Fast-Locked All-Digital Phase-Locked Loop With Phase-Frequency-Error Compensation.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Fast-Acquisition All-Digital Delay-Locked Loop Using a Starting-Bit Prediction Algorithm for the Successive-Approximation Register.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Fast-Transient Wide-Voltage-Range Digital-Controlled Buck Converter With Cycle-Controlled DPWM.
IEEE Trans. Very Large Scale Integr. Syst., 2016
2015
Designing a SAR-Based All-Digital Delay-Locked Loop With Constant Acquisition Cycles Using a Resettable Delay Line.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Simulating delta-sigma analog-to-digital converters with the Op-Amp nonlinearity using the Newton's method.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
The Soft-Injection-Locked Ring Oscillator and Its Application in a Vernier-Based TDC.
IEEE Trans. Instrum. Meas., 2014
Designing Hardware-Efficient Fixed-Point FIR Filters in an Expanding Subexpression Space.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
2013
A fast-locking wide-range all-digital delay-locked loop with a starting SAR-bit prediction mechanism.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
Proceedings of the IEEE International Symposium on Consumer Electronics, 2013
Proceedings of the IEEE International Symposium on Consumer Electronics, 2013
2012
IEEE Trans. Signal Process., 2012
The Design of Hybrid Asymmetric-FIR/Analog Pulse-Shaping Filters Against Receiver Timing Jitter.
IEEE Trans. Commun., 2012
Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2012
Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2012
2011
Proceedings of the 17th IEEE International Conference on Parallel and Distributed Systems, 2011
2010
Fixed-point FIR filter design and implementation in the expanding subexpression space.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
2008
An Application of the Second-Order Passive Lead-Lag Loop Filter for Analog PLLs to the Third-Order Charge-Pump PLLs.
IEEE Trans. Ind. Electron., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Stability Analysis of Fourth-Order Charge-Pump PLLs Using Linearized Discrete-Time Models.
IEICE Trans. Electron., 2007
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007
The Design of Symmetric Square-Root Pulse-Shaping Filters for Transmitters and Receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
The Analysis of Phase-jitter Variance in the Third-order CPPLL Frequency Synthesizer.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Fuzzy system-based adaptive iterative learning control for nonlinear plants with initial state errors.
IEEE Trans. Fuzzy Syst., 2004
A novel common-subexpression-elimination method for synthesizing fixed-point FIR filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Iterative learning of model reference adaptive controller for uncertain nonlinear systems with only output measurement.
Autom., 2004
An output-based adaptive iterative learning controller for high relative degree uncertain linear systems.
Autom., 2004
2003
A design flow for linear-phase fixed-point FIR filters: from the NPRM specifications to a VHDL code.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
A new algorithm of adaptive iterative learning control for uncertain robotic systems.
Proceedings of the 2003 IEEE International Conference on Robotics and Automation, 2003
2002
A Partial MILP Algorithm for the Design of Linear Phase FIR Filters with SPT Coefficients.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
2001
A study of SPT-term distribution of CSD numbers and its application for designing fixed-point linear phase FIR filters.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
1999
Int. J. Imaging Syst. Technol., 1999