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Chao Zhang

Orcid: 0000-0002-7892-5113

Affiliations:
  • Lehigh University, Department of Electrical and Computer Engineering, Bethlehem, PA, USA


According to our database1, Chao Zhang authored at least 6 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

Online presence:

On csauthors.net:

Bibliography

2022
ASA: Accelerating Sparse Accumulation in Column-wise SpGEMM.
[BibTeX]
[DOI]
Chao Zhang
,
Maximilian H. Bremer
,
Cy P. Chan
,
John Shalf
,
Xiaochen Guo
ACM Trans. Archit. Code Optim., 2022

2021
SPX64: A Scratchpad Memory for General-purpose Microprocessors.
[BibTeX]
[DOI]
Abhishek Singh
,
Shail Dave
,
Pantea Zardoshti
,
Robert Brotzman
,
Chao Zhang
,
Xiaochen Guo
,
Aviral Shrivastava
,
Gang Tan
,
Michael F. Spear
ACM Trans. Archit. Code Optim., 2021

2020
Scrabble: A Fine-Grained Cache with Adaptive Merged Block.
[BibTeX]
[DOI]
Chao Zhang
,
Yuan Zeng
,
Xiaochen Guo
IEEE Trans. Computers, 2020

RnR: A Software-Assisted Record-and-Replay Hardware Prefetcher.
[BibTeX]
[DOI]
Chao Zhang
,
Yuan Zeng
,
John Shalf
,
Xiaochen Guo
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

ECC Cache: A Lightweight Error Detection for Phase-Change Memory Stuck-At Faults.
[BibTeX]
[DOI]
Chao Zhang
,
Khaled Abdelaal
,
Angel Chen
,
Xinhui Zhao
,
Wujie Wen
,
Xiaochen Guo
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2017
Enabling efficient fine-grained DRAM activations with interleaved I/O.
[BibTeX]
[DOI]
Chao Zhang
,
Xiaochen Guo
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017


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