Wujie Wen

Orcid: 0000-0003-3440-1905

According to our database1, Wujie Wen authored at least 128 papers between 2012 and 2026.

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Timeline

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Bibliography

2026
AEGIS: Scaling Long-Sequence Homomorphic Encrypted Transformer Inference via Hybrid Parallelism on Multi-GPU Systems.
CoRR, April, 2026

When Small Variations Become Big Failures: Reliability Challenges in Compute-in-Memory Neural Accelerators.
CoRR, March, 2026

NeFT: Negative Feedback Training to Improve Robustness of Compute-in-Memory DNN Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2026

Efficient privacy-preserving sparse matrix-vector multiplication using homomorphic encryption.
Inf. Sci., 2026

Scaling Long-Sequence Homomorphic Encrypted Transformer Inference via Hybrid Parallelism on Multi-GPU Systems.
Proceedings of the 40th ACM International Conference on Supercomputing, 2026

Privacy-Preserving Constrained Evaluation of LLM-Generated HLS C/C++.
Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

2025
FHE-Agent: Automating CKKS Configuration for Practical Encrypted Inference via an LLM-Guided Agentic Framework.
CoRR, November, 2025

JigsawComm: Joint Semantic Feature Encoding and Transmission for Communication-Efficient Cooperative Perception.
CoRR, November, 2025

gHyPart: GPU-friendly End-to-End Hypergraph Partitioner.
ACM Trans. Archit. Code Optim., March, 2025

Attacking the spike: On the security of spiking neural networks to adversarial examples.
Neurocomputing, 2025

Invited Paper: Pushing SIMD Efficiency in Homomorphic Encryption for Machine Learning via Pattern-Aware Ciphertext Encoding.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
Secure and efficient general matrix multiplication on cloud using homomorphic encryption.
J. Supercomput., December, 2024

SSNet: A Lightweight Multi-Party Computation Scheme for Practical Privacy-Preserving Machine Learning Service in the Cloud.
CoRR, 2024

Zero-Space Cost Fault Tolerance for Transformer-based Language Models on ReRAM.
CoRR, 2024

Error Correction Output Codes for Robust Neural Networks against Weight-errors: A Neural Tangent Kernel Point of View.
Proceedings of the Advances in Neural Information Processing Systems 37: Annual Conference on Neural Information Processing Systems 2024, 2024

TSB: Tiny Shared Block for Efficient DNN Deployment on NVCIM Accelerators.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

AdaPI: Facilitating DNN Model Adaptivity for Efficient Private Inference in Edge Computing.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Ants: Attacking Spatial Temporal Graph Learning Networks Structurally.
Proceedings of the 48th IEEE Annual Computers, Software, and Applications Conference, 2024

Special Session: Sustainable Deployment of Deep Neural Networks on Non-Volatile Compute-in-Memory Accelerators.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2024

2023
Model Compression Hardens Deep Neural Networks: A New Perspective to Prevent Adversarial Attacks.
IEEE Trans. Neural Networks Learn. Syst., 2023

Negative Feedback Training: A Novel Concept to Improve Robustness of NVCiM DNN Accelerators.
CoRR, 2023

RRNet: Towards ReLU-Reduced Neural Network for Two-party Computation Based Private Inference.
CoRR, 2023

NeuroPots: Realtime Proactive Defense against Bit-Flip Attacks in Neural Networks.
Proceedings of the 32nd USENIX Security Symposium, 2023

Spectral-DP: Differentially Private Deep Learning through Spectral Perturbation and Filtering.
Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023

Penguin: Parallel-Packed Homomorphic Encryption for Fast Graph Convolutional Network Inference.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023

LinGCN: Structural Linearized Graph Convolutional Network for Homomorphically Encrypted Inference.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023

AQ2PNN: Enabling Two-party Privacy-Preserving Deep Neural Network Inference with Adaptive Quantization.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

COLA: Orchestrating Error Coding and Learning for Robust Neural Network Inference Against Hardware Defects.
Proceedings of the International Conference on Machine Learning, 2023

SpENCNN: Orchestrating Encoding and Sparsity for Fast Homomorphically Encrypted Neural Network Inference.
Proceedings of the International Conference on Machine Learning, 2023

AutoReP: Automatic ReLU Replacement for Fast Private Network Inference.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

Improving Realistic Worst-Case Performance of NVCiM DNN Accelerators Through Training with Right-Censored Gaussian Noise.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

PASNet: Polynomial Architecture Search Framework for Two-party Computation-based Secure Neural Network Deployment.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Neurogenesis Dynamics-inspired Spiking Neural Network Training Acceleration.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Securing the Spike: On the Transferabilty and Security of Spiking Neural Networks to Adversarial Examples.
CoRR, 2022

CryptoGCN: Fast and Scalable Homomorphically Encrypted Graph Convolutional Network Inference.
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

EVE: Environmental Adaptive Neural Network Models for Low-Power Energy Harvesting System.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

A length adaptive algorithm-hardware co-design of transformer on FPGA through sparse attention and dynamic pipelining.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Analyzing and Defending against Membership Inference Attacks in Natural Language Processing Classification.
Proceedings of the IEEE International Conference on Big Data, 2022

Reliable Memristive Neural Network Accelerators Based on Early Denoising and Sparsity Induction.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

NeuGuard: Lightweight Neuron-Guided Defense against Membership Inference Attacks.
Proceedings of the Annual Computer Security Applications Conference, 2022

2021
Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation.
ACM Trans. Embed. Comput. Syst., 2021

Safeguarding the Intelligence of Neural Networks with Built-in Light-weight Integrity MArks (LIMA).
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

Neural Pruning Search for Real-Time Object Detection of Autonomous Vehicles.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Efficient Implementation of Finite Field Arithmetic for Binary Ring-LWE Post-Quantum Cryptography Through a Novel Lookup-Table-Like Method.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
On Fundamental Principles for Thermal-Aware Design on Periodic Real-Time Multi-Core Systems.
ACM Trans. Design Autom. Electr. Syst., 2020

Thwarting Replication Attack Against Memristor-Based Neuromorphic Computing System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Guest Editorial: ACM JETC Special Issue on New Trends in Nanolectronic Device, Circuit, and Architecture Design: Part 2.
ACM J. Emerg. Technol. Comput. Syst., 2020

Introduction to the Special Issue on New Trends in Nanoelectronic Device, Circuit, and Architecture Design, Part 1.
ACM J. Emerg. Technol. Comput. Syst., 2020

Achieving Real-Time LiDAR 3D Object Detection on a Mobile Device.
CoRR, 2020

FPT-spike: a flexible precise-time-dependent single-spike neuromorphic computing architecture.
CCF Trans. High Perform. Comput., 2020

Orchestrating Medical Image Compression and Remote Segmentation Networks.
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2020, 2020

Defending Deep Learning-Based Biomedical Image Segmentation from Adversarial Attacks: A Low-Cost Frequency Refinement Approach.
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2020, 2020

ECC Cache: A Lightweight Error Detection for Phase-Change Memory Stuck-At Faults.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Concurrent Weight Encoding-based Detection for Bit-Flip Attack on Neural Network Accelerators.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

An Image Enhancing Pattern-Based Sparsity for Real-Time Inference on Mobile Devices.
Proceedings of the Computer Vision - ECCV 2020, 2020

Stealing Your Data from Compressed Machine Learning Models.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Monitoring the Health of Emerging Neural Network Accelerators with Cost-effective Concurrent Test.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Do Noises Bother Human and Neural Networks In the Same Way? A Medical Image Analysis Perspective.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2020

Tiny but Accurate: A Pruned, Quantized and Optimized Memristor Crossbar Framework for Ultra Efficient DNN Implementation.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

StegoNet: Turn Deep Neural Network into a Stegomalware.
Proceedings of the ACSAC '20: Annual Computer Security Applications Conference, 2020

2019
Thermal-constrained energy efficient real-time scheduling on multi-core platforms.
Parallel Comput., 2019

Thread Batching for High-performance Energy-efficient GPU Memory Design.
ACM J. Emerg. Technol. Comput. Syst., 2019

Progressive DNN Compression: A Key to Achieve Ultra-High Weight Pruning and Quantization Rates using ADMM.
CoRR, 2019

Deep-evasion: Turn deep neural network into evasive self-contained cyber-physical malware: poster.
Proceedings of the 12th Conference on Security and Privacy in Wireless and Mobile Networks, 2019

Making the Fault-Tolerance of Emerging Neural Network Accelerators Scalable.
Proceedings of the International Conference on Computer-Aided Design, 2019

E-RNN: Design Optimization for Efficient Recurrent Neural Networks in FPGAs.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

A Fault-Tolerant Neural Network Architecture.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Machine Vision Guided 3D Medical Image Compression for Efficient Transmission and Accurate Segmentation in the Clouds.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019

Feature Distillation: DNN-Oriented JPEG Compression Against Adversarial Examples.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019

Game Theoretic-Based Approaches for Cybersecurity-Aware Virtual Machine Placement in Public Cloud Clusters.
Proceedings of the 19th IEEE/ACM International Symposium on Cluster, 2019

A system-level perspective to understand the vulnerability of deep learning systems.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Universal Approximation Property and Equivalence of Stochastic Computing-Based Neural Networks and Binary Neural Networks.
Proceedings of the Thirty-Third AAAI Conference on Artificial Intelligence, 2019

2018
M-Oscillating: Performance Maximization on Temperature-Constrained Multi-Core Processors.
IEEE Trans. Parallel Distributed Syst., 2018

TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Improving AES Core Performance via an Advanced ASBUS Protocol.
ACM J. Emerg. Technol. Comput. Syst., 2018

Efficient LDPC Code Design for Combating Asymmetric Errors in STT-RAM.
ACM J. Emerg. Technol. Comput. Syst., 2018

ADAM-ADMM: A Unified, Systematic Framework of Structured Weight Pruning for DNNs.
CoRR, 2018

Feature Distillation: DNN-Oriented JPEG Compression Against Adversarial Examples.
CoRR, 2018

Special session on reliability and vulnerability of neuromorphic computing systems.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Enhancing the Robustness of Deep Neural Networks from "Smart" Compression.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

An ECC-Free MLC STT-RAM Based Approximate Memory Design for Multimedia Applications.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Defensive dropout for hardening deep neural networks under adversarial attacks.
Proceedings of the International Conference on Computer-Aided Design, 2018

3DICT: a reliable and QoS capable mobile process-in-memory architecture for lookup-based CNNs in 3D XPoint ReRAMs.
Proceedings of the International Conference on Computer-Aided Design, 2018

Online Geographical Load Balancing for Energy-Harvesting Mobile Edge Computing.
Proceedings of the 2018 IEEE International Conference on Communications, 2018

SIN<sup>2</sup>: Stealth infection on neural network - A low-cost agile neural Trojan attack methodology.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

A Systematic DNN Weight Pruning Framework Using Alternating Direction Method of Multipliers.
Proceedings of the Computer Vision - ECCV 2018, 2018

DeepN-JPEG: a deep neural network favorable JPEG-based image compression framework.
Proceedings of the 55th Annual Design Automation Conference, 2018

Security analysis and enhancement of model compressed deep learning systems under adversarial attacks.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

PT-spike: A precise-time-dependent single spike neuromorphic architecture with efficient supervised learning.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

An Energy-Efficient GPGPU Register File Architecture Using Racetrack Memory.
IEEE Trans. Computers, 2017

Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache.
IEEE Trans. Computers, 2017

A fast and ultra low power time-based spiking neuromorphic architecture for embedded applications.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Processor/memory Co-Scheduling using periodic resource server for real-time systems under peak temperature constraints.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

XNOR-POP: A processing-in-memory architecture for binary Convolutional Neural Networks in Wide-IO2 DRAMs.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

MT-spike: A multilayer time-based spiking neuromorphic architecture with temporal error backpropagation.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Thermal-aware joint CPU and memory scheduling for hard real-time tasks on multicore 3D platforms.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017

A Thermal-Balanced Variable-Sized-Bin-Packing Approach for Energy Efficient Multi-Core Real-Time Scheduling.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Building a Fast and Power Efficient Inductive Charge Pump System for 3D Stacked Phase Change Memories.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Design of a pre-scheduled data bus for advanced encryption standard encrypted system-on-chips.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Algorithm-hardware co-optimization of the memristor-based framework for solving SOCP and homogeneous QCQP problems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

A statistical STT-RAM retention model for fast memory subsystem designs.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Hardware Security Challenges Beyond CMOS: Attacks and Remedies.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Efficient Low-Density Parity-Check (LDPC) Code Decoding for Combating Asymmetric Errors in STT-RAM.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Performance Maximization via Frequency Oscillation on Temperature Constrained Multi-core Processors.
Proceedings of the 45th International Conference on Parallel Processing, 2016

Security of neuromorphic computing: thwarting learning attacks using memristor's obsolescence effect.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

A data locality-aware design framework for reconfigurable sparse matrix-vector multiplication kernel.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

A holistic tri-region MLC STT-RAM design with combined performance, energy, and reliability optimizations.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Sliding Basket: An adaptive ECC scheme for runtime write failure suppression of STT-RAM cache.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

On harmonic fixed-priority scheduling of periodic real-time tasks with constrained deadlines.
Proceedings of the 53rd Annual Design Automation Conference, 2016

TEMP: thread batch enabled memory partitioning for GPU.
Proceedings of the 53rd Annual Design Automation Conference, 2016

NVSim-VX<sup>s</sup>: an improved NVSim for variation aware STT-RAM simulation.
Proceedings of the 53rd Annual Design Automation Conference, 2016

AOS: adaptive overwrite scheme for energy-efficient MLC STT-RAM cache.
Proceedings of the 53rd Annual Design Automation Conference, 2016

A novel PUF based on cell error rate distribution of STT-RAM.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

Improving read performance of STT-MRAM based main memories through Smash Read and Flexible Read.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
FlexLevel: a novel NAND flash storage system design for LDPC latency reduction.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Recent progresses of STT memory design and applications.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability/Energy Analysis Method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

State-Restrict MLC STT-RAM Designs for High-Reliable High-Performance Memory System.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Exploration of GPGPU Register File Architecture Using Domain-wall-shift-write based Racetrack Memory.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

A New Field-assisted Access Scheme of STT-RAM with Self-reference Capability.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations.
ACM J. Emerg. Technol. Comput. Syst., 2013

CD-ECC: content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems.
Proceedings of the Design, Automation and Test in Europe, 2013

Loadsa: A yield-driven top-down design method for STT-RAM array.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Multi-level cell STT-RAM: Is it realistic or just a dream?
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

PS3-RAM: a fast portable and scalable statistical STT-RAM reliability analysis method.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012


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