Cheng-Hsiang Chiu

Orcid: 0000-0002-0406-885X

According to our database1, Cheng-Hsiang Chiu authored at least 7 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System.
Proceedings of the 2024 International Symposium on Physical Design, 2024

An Efficient Task-Parallel Pipeline Programming Framework.
Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2024

2023
Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++.
CoRR, 2022

Composing Pipeline Parallelism using Control Taskflow Graph.
Proceedings of the HPDC '22: The 31st International Symposium on High-Performance Parallel and Distributed Computing, Minneapolis, MN, USA, 27 June 2022, 2022

Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads.
Proceedings of the Euro-Par 2021: Parallel Processing Workshops, 2021


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