Chi-Li Yu

J. Signal Process. Syst., 2013

2012

Multidimensional DFT IP Generators for FPGA Platforms.

[BibT_eX]

[DOI]

PhD thesis, 2012

Transpose-free SAR imaging on FPGA platform.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2011

Multidimensional DFT IP Generator for FPGA Platforms.

[BibT_eX]

[DOI]

Kevin M. Irick

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A hardware architecture for accelerating neuromorphic vision algorithms.

[BibT_eX]

[DOI]

Ahmed Al-Maashri

Michael DeBole

Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

A framework for accelerating neuromorphic-vision algorithms on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

FPGA-accelerator system for computing biologically inspired feature extraction models.

[BibT_eX]

[DOI]

Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010

Bandwidth-intensive FPGA architecture for multi-dimensional DFT.

[BibT_eX]

[DOI]

Sungho Park

Proceedings of the IEEE International Conference on Acoustics, 2010

2008

Efficient image reconstruction using partial 2D Fourier transform.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

2007

On the Fixed-Point Properties of Mixed-Scaling-Rotation Cordic Algorithm.

[BibT_eX]

[DOI]

Tzu-Hao Yu

An-Yeu Wu

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

2006

On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

2001

An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter.

[BibT_eX]

[DOI]