Nandhini Chandramoorthy
According to our database1,
Nandhini Chandramoorthy
authored at least 30 papers
between 2012 and 2024.
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Bibliography
2024
MulBERRY: Enabling Bit-Error Robustness for Energy-Efficient Multi-Agent Autonomous Systems.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024
2023
Random and Adversarial Bit Error Robustness: Energy-Efficient and Secure DNN Accelerators.
IEEE Trans. Pattern Anal. Mach. Intell., March, 2023
NeuralFuse: Learning to Improve the Accuracy of Access-Limited Neural Network Inference in Low-Voltage Regimes.
CoRR, 2023
BERRY: Bit Error Robustness for Energy-Efficient Reinforcement Learning-Based Autonomous Systems.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
BoFL: bayesian optimized local training pace control for energy efficient federated learning.
Proceedings of the Middleware '22: 23rd International Middleware Conference, Quebec, QC, Canada, November 7, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
Proceedings of Machine Learning and Systems 2021, 2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Crossbar based Processing in Memory Accelerator Architecture for Graph Convolutional Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
2020
GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
2019
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
2018
Cascaded and resonant SRAM supply boosting for ultra-low voltage cognitive IoT applications.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
2016
IEEE Trans. Multi Scale Comput. Syst., 2016
2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
2014
Accelerating Multiresolution Gabor Feature Extraction for Real Time Vision Applications.
J. Signal Process. Syst., 2014
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014
Achieving High-Performance Video Analytics with Lightweight Cores and a Sea of Hardware Accelerators.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
J. Signal Process. Syst., 2013
A Configurable Architecture for a Visual Saliency System and Its Application in Retail.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013
2012
IPSJ Trans. Syst. LSI Des. Methodol., 2012
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012