Chian-Wei Liu

According to our database, Chian-Wei Liu authored at least 5 papers between 2014 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays.

Ching-Yi Huang, Yun-Jui Li, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan

IEEE Trans. Very Large Scale Integr. Syst., 2016

2015

Synthesis for Width Minimization in the Single-Electron Transistor Array.

Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan

IEEE Trans. Very Large Scale Integr. Syst., 2015

A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays.

Ching-Yi Huang, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

BDD-based synthesis of reconfigurable single-electron transistor arrays.

Zheng Zhao, Chian-Wei Liu, Chun-Yao Wang, Weikang Qian

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Width minimization in the Single-Electron Transistor array synthesis.

Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014