Suman Datta
Orcid: 0000-0001-6044-5173
According to our database1,
Suman Datta
authored at least 117 papers
between 2007 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2013, "For contributions to high-performance advanced silicon and compound semiconductor transistor technologies".
Timeline
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On csauthors.net:
Bibliography
2024
Towards Reverse-Engineering the Brain: Brain-Derived Neuromorphic Computing Approach with Photonic, Electronic, and Ionic Dynamicity in 3D integrated circuits.
CoRR, 2024
Paving the Way for Pass Disturb Free Vertical NAND Storage via A Dedicated and String-Compatible Pass Gate.
CoRR, 2024
2023
Large-Scale Cardiac Muscle Cell-Based Coupled Oscillator Network for Vertex Coloring Problem.
Adv. Intell. Syst., May, 2023
Reimagining Sense Amplifiers: Harnessing Phase Transition Materials for Current and Voltage Sensing.
CoRR, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Design of Ferroelectric-Metal Field-Effect Transistor for Multi-Level-Cell 3D NAND Flash.
Proceedings of the IEEE International Memory Workshop, 2023
2022
Design Space Exploration of Interconnect Materials for Cryogenic Operation: Electrical and Thermal Analyses.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Neuromorph. Comput. Eng., 2022
A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
BEOL Compatible Ferroelectric Routers for Run-time Reconfigurable Compute-in-Memory Accelerators.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Pulsed Current-Voltage Protocol to Reveal Polarization-Continuation in Ferroelectric Memory: Implications for Partial State Storage.
Proceedings of the Device Research Conference, 2022
2021
Inf. Process. Manag., 2021
Neural Sampling Machine with Stochastic Synapse allows Brain-like Learning and Inference.
CoRR, 2021
Adv. Intell. Syst., 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
CryoMem: A 4K-300K 1.3GHz eDRAM Macro with Hybrid 2T-Gain-Cell in a 28nm Logic Process for Cryogenic Applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
IEEE Des. Test, 2020
A Hybrid FeMFET-CMOS Analog Synapse Circuit for Neural Network Training and Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
IEEE Micro, 2019
IEEE Des. Test, 2019
Design space exploration of Ferroelectric FET based Processing-in-Memory DNN Accelerator.
CoRR, 2019
Spoken vowel classification using synchronization of phase transition nano-oscillators.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019
Polarization Recovery Behavior of Hf0.5Zr0.5O2 on Gallium Nitride HEMT Heterostructures.
Proceedings of the Device Research Conference, 2019
Significance of Multi and Few Domain Ferroelectric Switching Dynamics for Steep-Slope Non-Hysteretic Ferroelectric Field Effect Transistor.
Proceedings of the Device Research Conference, 2019
Proceedings of the Device Research Conference, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
AI based Safety System for Employees of Manufacturing Industries in Developing Countries.
CoRR, 2018
Dynamics of Coupled Systems and their Computing Properties Invited Paper : Invited Paper.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 20th International Conference on Enterprise Information Systems, 2018
A FeFET Based Processing-In-Memory Architecture for Solving Distributed Least-Square Optimizations.
Proceedings of the 76th Device Research Conference, 2018
Experimental Investigation of N-Channel Oxygen-Inserted (OI) Silicon Channel MOSFETs with High-K/Metal Gate Stack.
Proceedings of the 76th Device Research Conference, 2018
Proceedings of the 76th Device Research Conference, 2018
Investigation of Threshold Switch OFF -State Resistance on Performance Enhancement in 2D Mos2 Phase-FETs.
Proceedings of the 76th Device Research Conference, 2018
Cockcroft-Walton Multiplier based on Unipolar Ag/HfO<sub>2</sub>/Pt Threshold Switch.
Proceedings of the 76th Device Research Conference, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Stochastic IMT (insulator-metal-transition) neurons: An interplay of thermal and threshold noise at bifurcation.
CoRR, 2017
A Multitask Grocery Assist System for the Visually Impaired: Smart glasses, gloves, and shopping carts provide auditory and tactile feedback.
IEEE Consumer Electron. Mag., 2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Computational paradigms using oscillatory networks based on state-transition devices.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
Connecting spectral techniques for graph coloring and eigen properties of coupled dynamics: A pathway for solving combinatorial optimizations (Invited paper).
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Investigation of electrically gate-all-around hexagonal nanowire FET (HexFET) architecture for 5 nm node logic and SRAM applications.
Proceedings of the 47th European Solid-State Device Research Conference, 2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays.
IEEE Trans. Very Large Scale Integr. Syst., 2016
ACM Trans. Design Autom. Electr. Syst., 2016
IEEE Trans. Multi Scale Comput. Syst., 2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells.
ACM J. Emerg. Technol. Comput. Syst., 2016
CoRR, 2016
CoRR, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
On the potential of correlated materials in the design of spin-based cross-point memories (Invited).
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 17th International Conference on Distributed Computing and Networking, 2016
Incremental time series algorithms for IoT analytics: an example from autoregression.
Proceedings of the 17th International Conference on Distributed Computing and Networking, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications.
Proceedings of the 28th International Conference on VLSI Design, 2015
Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 2015 International Conference on Compilers, 2015
A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Exploiting Synchronization Properties of Correlated Electron Devices in a Non-Boolean Computing Fabric for Template Matching.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisition.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
ACM J. Emerg. Technol. Comput. Syst., 2013
Design of energy-efficient circuits and systems using tunnel field effect transistors.
IET Circuits Devices Syst., 2013
Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications.
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
On reconfigurable single-electron transistor arrays synthesis using reordering techniques.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011
Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
2010
Energy-Delay Performance of Nanoscale Transistors Exhibiting Single Electron Behavior and Associated Logic Circuits.
J. Low Power Electron., 2010
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
A novel si-tunnel FET based SRAM design for ultra low-power 0.3V V<sub><i>DD</i></sub> applications.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Proceedings of the Fuzzy Systems in Bioinformatics and Computational Biology, 2009
Proceedings of the Nano-Net - 4th International ICST Conference, 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Low voltage tunnel transistor architecture and its viability for energy efficient logic applications.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
2008
Proceedings of the 2008 IEEE International Symposium on Nanoscale Architectures, 2008
2007
Accelerated search for biomolecular network models to interpret high-throughput experimental data.
BMC Bioinform., 2007