Chikafumi Takahashi

According to our database, Chikafumi Takahashi authored at least 4 papers between 2004 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

A 16 nm FinFET Heterogeneous Nona-Core SoC Supporting ISO26262 ASIL B Standard.

Shinichi Shibahara, Chikafumi Takahashi, Kazuki Fukuoka, Yuko Kitaji, Takahiro Irita, Hirotaka Hara, Yasuhisa Shimazaki, Jun Matsushima

IEEE J. Solid State Circuits, 2017

2016

4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10-7 random hardware failures per hour reliability.

Chikafumi Takahashi, Shinichi Shibahara, Kazuki Fukuoka, Jun Matsushima, Yuko Kitaji, Yasuhisa Shimazaki, Hirotaka Hara, Takahiro Irita

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2005

Empirical Study for Optimization of Power-Performance with On-Chip Memory.

Chikafumi Takahashi, Mitsuhisa Sato, Daisuke Takahashi, Taisuke Boku, Hiroshi Nakamura, Masaaki Kondo, Motonobu Fujita

Proceedings of the High-Performance Computing - 6th International Symposium, 2005

2004

SCIMA-SMP: on-chip memory processor architecture for SMP.

Chikafumi Takahashi, Masaaki Kondo, Taisuke Boku, Daisuke Takahashi, Hiroshi Nakamura, Mitsuhisa Sato

Proceedings of the 3rd Workshop on Memory Performance Issues, 2004