Chrystian Guth

According to our database1, Chrystian Guth authored at least 11 papers between 2012 and 2017.

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Bibliography

2017
Exploiting cache locality to speedup register clustering.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library.
Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

2016
Clock-Tree-Aware Incremental Timing-Driven Placement.
ACM Trans. Design Autom. Electr. Syst., 2016

Evaluating the impact of circuit legalization on incremental optimization techniques.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Speeding up Incremental Legalization with Fast Queries to Multidimensional Trees.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Exploiting parallelism to speed up circuit legalization.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression.
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing Optimization.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014
A Hybrid Technique for Discrete Gate Sizing Based on Lagrangian Relaxation.
ACM Trans. Design Autom. Electr. Syst., 2014

2013
Fast and efficient lagrangian relaxation-based discrete gate sizing.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Lagrangian relaxation-based Discrete Gate Sizing for leakage power minimization.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012


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