Laércio Lima Pilla

According to our database1, Laércio Lima Pilla authored at least 46 papers between 2008 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
EagerMap: A Task Mapping Algorithm to Improve Communication and Load Balancing in Clusters of Multicore Systems.
TOPC, 2019

How Deep Learning Can Drive Physical Synthesis Towards More Predictable Legalization.
Proceedings of the 2019 International Symposium on Physical Design, 2019

2018
A Cost Model for IaaS Clouds Based on Virtual Machine Energy Consumption.
J. Grid Comput., 2018

MigPF: Towards on self-organizing process rescheduling of Bulk-Synchronous Parallel applications.
Future Generation Comp. Syst., 2018

A branch and bound strategy for Fast Trajectory Similarity Measuring.
Data Knowl. Eng., 2018

Enhancing Multi-Threaded Legalization Through k-d Tree Circuit Partitioning.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

A Batch Task Migration Approach for Decentralized Global Rescheduling.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

Improving Communication and Load Balancing with Thread Mapping in Manycore Systems.
Proceedings of the 26th Euromicro International Conference on Parallel, 2018

2017
Experimental and analytical study of Xeon Phi reliability.
Proceedings of the International Conference for High Performance Computing, 2017

Exploiting cache locality to speedup register clustering.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library.
Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

Radiation-Induced Error Criticality in Modern HPC Parallel Accelerators.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016
Evaluation and Mitigation of Radiation-Induced Soft Errors in Graphics Processing Units.
IEEE Trans. Computers, 2016

Hardware-Assisted Thread and Data Mapping in Hierarchical Multicore Architectures.
TACO, 2016

LAPT: A locality-aware page table for thread and data mapping.
Parallel Computing, 2016

Value Reuse Potential in ARM Architectures.
Proceedings of the 28th International Symposium on Computer Architecture and High Performance Computing, 2016

Exploiting parallelism to speed up circuit legalization.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A Sharing-Aware Memory Management Unit for Online Mapping in Multi-core Architectures.
Proceedings of the Euro-Par 2016: Parallel Processing, 2016

Exploration of Load Balancing Thresholds to Save Energy on Iterative Applications.
Proceedings of the High Performance Computing - Third Latin American Conference, 2016

2015
Characterizing communication and page usage of parallel applications for thread and data mapping.
Perform. Eval., 2015

Performance/energy trade-off in scientific computing: the case of ARM big.LITTLE and Intel Sandy Bridge.
IET Computers & Digital Techniques, 2015

Understanding the Effect of Multiple Factors on a Parallel File System's Performance.
Proceedings of the 24th IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, 2015

An Efficient Algorithm for Communication-Based Task Mapping.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

The Path to Exascale: Code Optimizations and Hardening Solutions Reliability.
Proceedings of the 5th Workshop on Fault Tolerance for HPC at eXtreme Scale, 2015

2014
Topology-Aware Load Balancing for Performance Portability over Parallel High Performance Systems. (Équilibrage de charge prenant en compte la topologie des plates-formes de calcul parallèle pour la portabilité des performances).
PhD thesis, 2014

A topology-aware load balancing algorithm for clustered hierarchical multi-core machines.
Future Generation Comp. Syst., 2014

Optimizing Memory Locality Using a Locality-Aware Page Table.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

Improving the Performance of Seismic Wave Simulations with Dynamic Load Balancing.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Saving energy by exploiting residual imbalances on iterative applications.
Proceedings of the 21st International Conference on High Performance Computing, 2014

Impact of GPUs Parallelism Management on Safety-Critical and HPC Applications Reliability.
Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014

Radiation Sensitivity of High Performance Computing Applications on Kepler-Based GPGPUs.
Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014

GPGPUs ECC efficiency and efficacy.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2013
Evaluating application performance and energy consumption on hybrid CPU+GPU architecture.
Cluster Computing, 2013

Neutron sensitivity and software hardening strategies for matrix multiplication and FFT on graphics processing units.
Proceedings of the 3rd Workshop on Fault-tolerance for HPC at extreme scale, 2013

2012
Atmospheric models hybrid OpenMP/MPI implementation multicore cluster evaluation.
IJITCC, 2012

A Hierarchical Approach for Load Balancing on Parallel Multi-core Systems.
Proceedings of the 41st International Conference on Parallel Processing, 2012

Asymptotically Optimal Load Balancing for Hierarchical Multi-Core Systems.
Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

2011
Improving Performance on Atmospheric Models through a Hybrid OpenMP/MPI Implementation.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2011

Combining Multiple Metrics to Control BSP Process Rescheduling in Response to Resource and Application Dynamics.
Proceedings of the 17th IEEE International Conference on Parallel and Distributed Systems, 2011

2010
Observing the Impact of Multiple Metrics and Runtime Adaptations on BSP Process Rescheduling.
Parallel Processing Letters, 2010

Applying Process Migration on a BSP-Based LU Decomposition Application.
Proceedings of the High Performance Computing for Computational Science - VECPAR 2010, 2010

Supporting performance and adaptivity on BSP process rescheduling.
Proceedings of the 15th IEEE Symposium on Computers and Communications, 2010

2009
Applying Processes Rescheduling over Irregular BSP Application.
Proceedings of the Computational Science, 2009

MigBSP: A Novel Migration Model for Bulk-Synchronous Parallel Processes Rescheduling.
Proceedings of the 11th IEEE International Conference on High Performance Computing and Communications, 2009

2008
Controlling Processes Reassignment in BSP Applications.
Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008

ICE: Managing Multiple Clusters Using Web Services.
Proceedings of the 11th IEEE International Conference on Computational Science and Engineering, 2008


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