Renan Netto

According to our database, Renan Netto authored at least 17 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2024

ILPGRC: ILP-Based Global Routing Optimization With Cell Movements.

Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, Laleh Behjat, José Luís Güntzel

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

2023

CRP2.0: A Fast and Robust Cooperation between Routing and Placement in Advanced Technology Nodes.

Erfan Aghaeekiasaraee, Aysa Fakheri Tabrizi, Tiago Augusto Fontana, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, José Luís Güntzel, David T. Westwick, Laleh Behjat

ACM Trans. Design Autom. Electr. Syst., September, 2023

2022

Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning.

Renan Netto, Sheiny Fabre, Tiago Augusto Fontana, Vinicius S. Livramento, Laércio Lima Pilla, Laleh Behjat, José Luís Güntzel

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

E-RVP: An Initial Design Rule Violation Predictor Using Placement Information.

Sheiny Fabre Almeida, Aysa Fakheri Tabrizi, Erfan Aghaeekiasaraee, Renan Netto, Tiago Augusto Fontana, Upma Gandhi, José Luís Güntzel, Laleh Behjat, Cristina Meinhardt

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

CR&P: An Efficient Co-operation between Routing and Placement.

Erfan Aghaeekiasaraee, Aysa Fakheri Tabrizi, Tiago Augusto Fontana, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, José Luís Gützel, David T. Westwick, Laleh Behjat

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

ILP-Based Global Routing Optimization with Cell Movements.

Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, Aysa Fakheri Tabrizi, David T. Westwick, Laleh Behjat, José Luís Güntzel

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

2019

How Deep Learning Can Drive Physical Synthesis Towards More Predictable Legalization.

Renan Netto, Sheiny Fabre, Tiago Augusto Fontana, Vinicius S. Livramento, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 2019 International Symposium on Physical Design, 2019

2018

Enhancing Multi-Threaded Legalization Through k-d Tree Circuit Partitioning.

Sheiny Fabre, José Luís Güntzel, Laércio Lima Pilla, Renan Netto, Tiago Fontana, Vinicius S. Livramento

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

2017

Exploiting cache locality to speedup register clustering.

Tiago Augusto Fontana, Sheiny Almeida, Renan Netto, Vinicius S. Livramento, Chrystian Guth, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library.

Tiago Fontana, Renan Netto, Vinicius S. Livramento, Chrystian Guth, Sheiny Almeida, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

2016

Clock-Tree-Aware Incremental Timing-Driven Placement.

Vinicius S. Livramento, Renan Netto, Chrystian Guth, José Luís Güntzel, Luiz Cláudio Villar dos Santos

ACM Trans. Design Autom. Electr. Syst., 2016

Evaluating the impact of circuit legalization on incremental optimization techniques.

Renan Netto, Vinicius S. Livramento, Chrystian Guth, Luiz C. V. dos Santos, José Luís Güntzel

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Speeding up Incremental Legalization with Fast Queries to Multidimensional Trees.

Renan Netto, Vinicius S. Livramento, Chrystian Guth, Luiz C. V. dos Santos, José Luís Güntzel

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Exploiting parallelism to speed up circuit legalization.

Renan Netto, Chrystian Guth, Vinicius S. Livramento, Márcio Castro, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression.

Chrystian Guth, Vinicius S. Livramento, Renan Netto, Renan Fonseca, José Luís Güntzel, Luiz C. V. dos Santos

Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing Optimization.

Vinicius S. Livramento, Chrystian Guth, Renan Netto, José Luís Almada Güntzel, Luiz C. V. dos Santos

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2013

VLSI architectures for Digital Modulation Classification using Support Vector Machines.

Edson Sorato, Renan Netto, Pedro Michel, José Luís Güntzel, Adalbery R. Castro, Aldebaro Klautau

Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013