# Chung-Ching Shen

According to our database

Collaborative distances:

^{1}, Chung-Ching Shen authored at least 27 papers between 2006 and 2014.Collaborative distances:

## Timeline

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Book In proceedings Article PhD thesis Other## Links

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## Bibliography

2014

Dataflow-Based, Cross-Platform Design Flow for DSP Applications.

Proceedings of the Embedded Systems Development, From Functional Models to Implementations, 2014

2013

Parameterized Scheduling of Topological Patterns in Signal Processing Dataflow Graphs.

Signal Processing Systems, 2013

Instrumentation-Driven Model Detection and Actor Partitioning for Dataflow Graphs.

IJERTCS, 2013

Parameterized core functional dataflow graphs and their application to design and implementation of wireless communication systems.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Configurable, resource-optimized FFT architecture for OFDM communication.

Proceedings of the IEEE International Conference on Acoustics, 2013

A system-level design approach for dynamic resource coordination and energy optimization in sensor network platforms.

Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012

Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware.

Signal Processing Systems, 2012

Design and Synthesis for Multimedia Systems Using the Targeted Dataflow Interchange Format.

IEEE Trans. Multimedia, 2012

Multidimensional Dataflow Graph Modeling and Mapping for Efficient GPU Implementation.

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Parameterized scheduling for signal processing systems using topological patterns.

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

NT-SIM: A co-simulator for networked signal processing applications.

Proceedings of the 20th European Signal Processing Conference, 2012

2011

Design methods for Wireless Sensor Network Building Energy Monitoring Systems.

Proceedings of the IEEE 36th Conference on Local Computer Networks, 2011

A Model-Based Schedule Representation for Heterogeneous Mapping of Dataflow Graphs.

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

A design tool for efficient mapping of multimedia applications onto heterogeneous platforms.

Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011

Teaching cross-platform design and testing methods for embedded systems using DICE.

Proceedings of the 6th Workshop on Embedded Systems Education, 2011

Modeling and optimization of dynamic signal processing in resource-aware sensor networks.

Proceedings of the 8th IEEE International Conference on Advanced Video and Signal-Based Surveillance, 2011

2010

Energy-driven distribution of signal processing applications across wireless sensor networks.

TOSN, 2010

2008

Energy-driven Optimization of Hardware and Software for Distributed Embedded Systems.

PhD thesis, 2008

Memory-constrained Block Processing for DSP Software Optimization.

Signal Processing Systems, 2008

Design and optimization of a distributed, embedded speech recognition system.

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2007

Synthesis of DSP Architectures Using Libraries of Coarse-Grain Configurations.

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

An Energy-Driven Design Methodology for Distributing DSP Applications across Wireless Sensor Networks.

Proceedings of the 28th IEEE Real-Time Systems Symposium (RTSS 2007), 2007

Compact, Low Power Wireless Sensor Network System for Line Crossing Recognition.

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Design Techniques for Streamlined Integration and Fault Tolerance in a Distributed Sensor System for Line-crossing Recognition.

Proceedings of the 16th International Conference on Computer Communications and Networks, 2007

2006

Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks.

Proceedings of the Embedded Computer Systems: Architectures, 2006

Memory-constrained Block Processing Optimization for Synthesis of DSP Software.

Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Model-Based OpenMP Implementation of a 3D Facial Pose Tracking System.

Proceedings of the 2006 International Conference on Parallel Processing Workshops (ICPP Workshops 2006), 2006