D. Prabakaran

According to our database, D. Prabakaran authored at least 2 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

7.2: A 2.2pJ/b 212.5Gb/s PAM-4 Transceiver with >46dB Reach in 5nm FinFET.

Ahmed Mostafa, A. Hassan, A. Hsu, A. K. Singh, C.-H. Wu, C.-R. Yang, D. Prabakaran, Daniel W. Storaska, D. Zhou, Davide Visani, Edmund Hsiao, F. Chu, F. Khan, Fei Lu, G. Cui, G. Wang, J. Natonio, J. Deng, J. Ding, J. Guo, J. Gu, J. Zang, L. Jiang, K.-M. Lu, Mehedi Hasan, M. Kelly, M. H. Kashani, M. Gambhir, M. R. Patoju, M. Singh, M. Shannon, M. Yang, P. Liu, I P. Ramakrishna, R. Chen, R. Ho, S. N. Shahi, S. Sivakumar, S. Xu, X. Yang, X. Han, Y.-P. Su, Z. Adal, Z. Guo, Z. Li, Z. Yu, Z. Yan, H. Wang, K. Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024

A 1.1pJ/b/Lane, 1.8Tb/s Chiplet Over XSR-MCM Channels Using 113Gb/s PAM-4 Transceiver with Signal Equalization and Envelope Adaptation Using TX-FFE in 5nm CMOS.

Gautam R. Gangasani, A. Mostafa, A. Singh, Daniel W. Storaska, D. Prabakaran, K. Mohammad, Matthew Baecher, M. Shannon, Michael Sorna, Michael Wielgos, P. Jenkins, P. B. Ramakrishna, U. K. Shukla

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024