Daehyun Ahn
Orcid: 0000-0001-8050-9963
According to our database1,
Daehyun Ahn
authored at least 17 papers
between 2018 and 2024.
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Bibliography
2024
QUICK: Quantization-aware Interleaving and Conflict-free Kernel for efficient LLM inference.
CoRR, 2024
2023
V-LSTM: An Efficient LSTM Accelerator Using Fixed Nonzero-Ratio Viterbi-Based Pruning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Leveraging Early-Stage Robustness in Diffusion Models for Efficient and High-Quality Image Synthesis.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
2022
Workload-Balanced Graph Attention Network Accelerator with Top-K Aggregation Candidates.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
2021
Maximizing Parallel Activation of Word-Lines in MRAM-Based Binary Neural Network Accelerators.
IEEE Access, 2021
SPRITE: Sparsity-Aware Neural Processing Unit with Constant Probability of Index-Matching.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Energy-efficient charge sharing-based 8T2C SRAM in-memory accelerator for binary neural networks in 28nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
Balancing Computation Loads and Optimizing Input Vector Loading in LSTM Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
OPTIMUS: OPTImized matrix MUltiplication Structure for Transformer neural network accelerator.
Proceedings of Machine Learning and Systems 2020, 2020
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
V-LSTM: An Efficient LSTM Accelerator Using Fixed Nonzero-Ratio Viterbi-Based Pruning.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020
2019
Double Viterbi: Weight Encoding for High Compression Ratio and Fast On-Chip Reconstruction for Deep Neural Network.
Proceedings of the 7th International Conference on Learning Representations, 2019
2018
Input-Splitting of Large Neural Networks for Power-Efficient Accelerator with Resistive Crossbar Memory Array.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the 6th International Conference on Learning Representations, 2018