David De Roest

According to our database1, David De Roest authored at least 4 papers between 2002 and 2003.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2003
Global interconnect trade-off for technology over memory modules to application level: case study.
Proceedings of the 5th International Workshop on System-Level Interconnect Prediction (SLIP 2003), 2003

2002
A CAD-oriented analytical model for frequency-dependent series resistance and inductance of microstrip on-chip interconnect on silicon substrate.
Microprocess. Microsystems, 2002

Interconnect exploration for future wire dominated technologies.
Proceedings of the Fourth IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2002), 2002

Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate.
Proceedings of the 2002 Design, 2002


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