Karen Maex

According to our database1, Karen Maex authored at least 16 papers between 2000 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


Impact of interconnect resistance increase on system performance of low power and high performance designs.
Proceedings of the Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), 2006

Statistically Aware SRAM Memory Array Design.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

A new method for the lifetime determination of submicron metal interconnects by means of a parallel test structure.
Microelectronics Reliability, 2005

Layout dependency induced deviation from Poisson area scaling in BEOL dielectric reliability.
Microelectronics Reliability, 2005

Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules.
Proceedings of the 2005 Design, 2005

Analog and Digital Circuit Design in 65 nm CMOS: End of the Road?
Proceedings of the 2005 Design, 2005

Interconnect width selection for deep submicron designs using the table lookup method.
Proceedings of the Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), 2004

How Can System-Level Design Solve the Interconnect Technology Scaling Problem?
Proceedings of the 2004 Design, 2004

Global interconnect trade-off for technology over memory modules to application level: case study.
Proceedings of the 5th International Workshop on System-Level Interconnect Prediction (SLIP 2003), 2003

Frequency dependence in interline capacitance measurements.
IEEE Trans. Instrumentation and Measurement, 2002

A CAD-oriented analytical model for frequency-dependent series resistance and inductance of microstrip on-chip interconnect on silicon substrate.
Microprocessors and Microsystems, 2002

Interconnect exploration for future wire dominated technologies.
Proceedings of the Fourth IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2002), 2002

Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate.
Proceedings of the 2002 Design, 2002

Frequency-dependent mutual resistance and inductance formulas for coupled IC interconnects on an Si-SiO2 substrate.
Integration, 2001

On the two-dimensional capacitance calculation of multiconductor multilayered interconnects.
Annales des Télécommunications, 2001

Computation of capacitance matrix for integrated circuit interconnects using semi-analytic Green's function method.
Integration, 2000